公开(公告)号：US20210175804A1

公开(公告)日：2021-06-10

申请号：US16708066

申请日：2019-12-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ivan SHUMKOV ,  Christian HARDER ,  Erich-Johann BAYER ,  Joerg KIRCHNER ,  Gaetano PETRINA

IPC: H02M3/158

Abstract: Aspects of the present disclosure provide for a circuit. In at least some examples, the circuit includes a first switch coupled between a first node and a second node and a second switch coupled between a third node and the second node. The circuit further includes a resistor coupled between the second node and a fourth node and a capacitor comprising a first terminal coupled to the fourth node and a second terminal. The circuit further includes a transistor comprising a drain terminal coupled to the third node, a source terminal coupled to a fifth node, and a gate terminal and an amplifier comprising a first input terminal coupled to the fifth node, a second input terminal coupled to the fourth node, and an output terminal coupled to a sixth node.

公开(公告)号：US20220271649A1

公开(公告)日：2022-08-25

申请号：US17184721

申请日：2021-02-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joerg KIRCHNER ,  Stefan SCHIMONSKY

IPC: H02M1/36 ,  G05F1/575 ,  H02M3/158 ,  H02M3/157

Abstract: A soft-start circuit includes an error amplifier, a reference voltage ramp circuit, and a minimum current clamp circuit. The error amplifier is configured to generate a difference voltage representing a difference of a feedback voltage and a reference voltage ramp. The reference voltage ramp circuit is configured to generate the reference voltage ramp. The minimum current clamp circuit is configured to clamp an output of the error amplifier to a predetermined minimum voltage.

公开(公告)号：US20210184575A1

公开(公告)日：2021-06-17

申请号：US16712498

申请日：2019-12-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joerg KIRCHNER ,  Stefan DIETRICH ,  Gaetano Maria Walter PETRINA

IPC: H02M3/158 ,  H02M1/08

Abstract: Aspects of the disclosure provide for a circuit comprising a power converter controller. In an example, the power converter controller is configured to receive a signal representative of a current of a power converter, compare the signal representative of the current of the power converter to an error signal and generate a peak current detection signal having an asserted value when the signal representative of the current of the power converter is not less than the error signal. A state machine circuit is coupled the peak current detection circuit. The state machine circuit is configured to receive the peak current detection signal, a clock signal, and a timer signal and implement a state machine to generate at least one control signal for controlling a mode and a phase of operation of the power converter based on values of the peak current detection signal, the clock signal, and the timer signal.