公开(公告)号：US20230170798A1

公开(公告)日：2023-06-01

申请号：US17537802

申请日：2021-11-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Puneet SAREEN ,  Michael KÄNNER ,  Christian HARDER ,  Narayanan SEETHARAMAN

IPC: H02M3/157 ,  H02M1/00

CPC classification number: H02M3/157 ,  H02M1/0041

Abstract: A switching converter controller includes: a stopband controller having a stopband controller input and a stopband controller output, the stopband controller is configured to provide stopband information at the stopband controller output responsive to a reference signal; a pulse-frequency modulation (PFM) controller having a first PFM controller input, a second PFM controller input and a PFM controller output, the first PFM controller input configured to receive a feedback error signal, the second PFM controller input coupled to the stopband controller output, and the PFM controller configured to selectively adjust a clock signal at the PFM controller output based on the feedback error signal and the stopband information; and a driver circuit having a driver circuit input coupled to the PFM controller output and configured to receive the clock signal, and having a driver circuit output adapted to be coupled to a power stage switch.

公开(公告)号：US20210175804A1

公开(公告)日：2021-06-10

申请号：US16708066

申请日：2019-12-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ivan SHUMKOV ,  Christian HARDER ,  Erich-Johann BAYER ,  Joerg KIRCHNER ,  Gaetano PETRINA

IPC: H02M3/158

Abstract: Aspects of the present disclosure provide for a circuit. In at least some examples, the circuit includes a first switch coupled between a first node and a second node and a second switch coupled between a third node and the second node. The circuit further includes a resistor coupled between the second node and a fourth node and a capacitor comprising a first terminal coupled to the fourth node and a second terminal. The circuit further includes a transistor comprising a drain terminal coupled to the third node, a source terminal coupled to a fifth node, and a gate terminal and an amplifier comprising a first input terminal coupled to the fifth node, a second input terminal coupled to the fourth node, and an output terminal coupled to a sixth node.