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公开(公告)号:US20220326954A1
公开(公告)日:2022-10-13
申请号:US17849994
申请日:2022-06-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Kai Chirca , Timothy D. Anderson , David E. Smith, JR. , Paul D. Gauvreau
Abstract: A computer-implemented method includes fetching a fetch-packet containing a first hyper-block from a first address of a memory, the fetch-packet containing a bitwise distance from an entry point of the first hyper-block to a predicted exit point; executing a first branch instruction of the first hyper-block, wherein the first branch instruction corresponds to a first exit point, and wherein the first branch instruction includes an address corresponding to an entry point of a second hyper-block; storing, responsive to executing the first branch instruction, a bitwise distance from the entry point of the first hyper-block to the first exit point; and moving a program counter from the first exit point of the first hyper-block to the entry point of the second hyper-block.
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公开(公告)号:US12197917B2
公开(公告)日:2025-01-14
申请号:US17849994
申请日:2022-06-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Kai Chirca , Timothy D. Anderson , David E. Smith, Jr. , Paul D. Gauvreau
Abstract: A computer-implemented method includes fetching a fetch-packet containing a first hyper-block from a first address of a memory. The fetch-packet contains a bitwise distance from an entry point of the first hyper-block to a predicted exit point. A first branch instruction of the first hyper-block is executed that corresponds to a first exit point. The first branch instruction includes an address corresponding to an entry point of a second hyper-block. Responsive to executing the first branch instruction, a bitwise distance from the entry point of the first hyper-block to the first exit point is stored. A program counter is moved from the first exit point of the first hyper-block to the entry point of the second hyper-block.
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公开(公告)号:US11372646B2
公开(公告)日:2022-06-28
申请号:US16684410
申请日:2019-11-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Kai Chirca , Timothy D. Anderson , David E. Smith, Jr. , Paul D. Gauvreau
Abstract: A computer-implemented method includes fetching a fetch-packet containing a first hyper-block from a first address of a memory. The fetch-packet contains a bitwise distance from an entry point of the first hyper-block to a predicted exit point. The method further includes executing a first branch instruction of the first hyper-block. The first branch instruction corresponds to a first exit point. The first branch instruction includes an address corresponding to an entry point of a second hyper-block. The method also includes storing, responsive to executing the first branch instruction, a bitwise distance from the entry point of the first hyper-block to the first exit point. The method further includes moving a program counter from the first exit point of the first hyper-block to the entry point of the second hyper-block.
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公开(公告)号:US20200210191A1
公开(公告)日:2020-07-02
申请号:US16684410
申请日:2019-11-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Kai Chirca , Timothy D. Anderson , David E. Smith, JR. , Paul D. Gauvreau
Abstract: A computer-implemented method includes fetching a fetch-packet containing a first hyper-block from a first address of a memory, the fetch-packet containing a bitwise distance from an entry point of the first hyper-block to a predicted exit point; executing a first branch instruction of the first hyper-block, wherein the first branch instruction corresponds to a first exit point, and wherein the first branch instruction includes an address corresponding to an entry point of a second hyper-block; storing, responsive to executing the first branch instruction, a bitwise distance from the entry point of the first hyper-block to the first exit point; and moving a program counter from the first exit point of the first hyper-block to the entry point of the second hyper-block.
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