公开(公告)号：US11374571B2

公开(公告)日：2022-06-28

申请号：US17015645

申请日：2020-09-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joao Carlos Brito ,  Philip Anthony Coyle

IPC: H03K19/0175 ,  H01L23/528 ,  H03K19/21 ,  H01L23/495 ,  H01L23/00 ,  H01L23/522

Abstract: An integrated circuit provides a semiconductor die with I/O bond pads, a power bond pad, and a circuit ground pad. Each I/O bond pad is associated with an input circuit that has an input circuit output lead. Sets of digital logic functional circuitry on the die provide different digital logic functions. Each function includes logic input leads and logic output leads. Output circuits each have an output circuit in lead and an output circuit out lead. Strapping structures, such as vias, formed in the semiconductor die electrically couple input circuits to a selected set of digital logic functions and the selected set of digital logic functions to output circuit in leads. Upper level metal conductors couple output circuit out leads and selected I/O bond pads.

公开(公告)号：US10804900B2

公开(公告)日：2020-10-13

申请号：US16107388

申请日：2018-08-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joao Carlos Brito ,  Philip Anthony Coyle

IPC: H03K19/0175 ,  H01L23/528 ,  H03K19/21 ,  H01L23/495 ,  H01L23/00 ,  H01L23/522

Abstract: An integrated circuit provides a semiconductor die with I/O bond pads, a power bond pad, and a circuit ground pad. Each I/O bond pad is associated with an input circuit that has an input circuit output lead. Sets of digital logic functional circuitry on the die provide different digital logic functions. Each function includes logic input leads and logic output leads. Output circuits each have an output circuit in lead and an output circuit out lead. Strapping structures, such as vias, formed in the semiconductor die electrically couple input circuits to a selected set of digital logic functions and the selected set of digital logic functions to output circuit in leads. Upper level metal conductors couple output circuit out leads and selected I/O bond pads.

公开(公告)号：US20200067509A1

公开(公告)日：2020-02-27

申请号：US16107388

申请日：2018-08-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joao Carlos Brito ,  Philip Anthony Coyle

IPC: H03K19/0175 ,  H01L23/528 ,  H01L23/522 ,  H01L23/495 ,  H01L23/00 ,  H03K19/21

Abstract: An integrated circuit provides a semiconductor die with I/O bond pads, a power bond pad, and a circuit ground pad. Each I/O bond pad is associated with an input circuit that has an input circuit output lead. Sets of digital logic functional circuitry on the die provide different digital logic functions. Each function includes logic input leads and logic output leads. Output circuits each have an output circuit in lead and an output circuit out lead. Strapping structures, such as vias, formed in the semiconductor die electrically couple input circuits to a selected set of digital logic functions and the selected set of digital logic functions to output circuit in leads. Upper level metal conductors couple output circuit out leads and selected I/O bond pads.