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公开(公告)号：US20230253881A1
公开(公告)日：2023-08-10
申请号：US17966664
申请日：2022-10-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vineet KHURANA , Rinu MATHEW , Gayathri MURUGESH , Aniruddha PERIYAPATNA NAGENDRA , Prachi MISHRA
Abstract: In some examples, a circuit includes sensing circuitry, a synchronization circuit, and a controller. The sensing circuitry is configured to provide a comparison result based on a comparison between a reference voltage and a feedback voltage. The synchronization circuit is configured to synchronize the comparison result into a clock domain to form a synchronous comparison result. The controller is configured to receive the synchronous comparison result, determine a predicted gate control signal based on the synchronous comparison result, determine a gate control signal based on the synchronous comparison result, provide the predicted gate control signal to the sensing circuitry as the feedback voltage, and provide the gate control signal for controlling a power converter.
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公开(公告)号：US20230091498A1
公开(公告)日：2023-03-23
申请号：US17482676
申请日：2021-09-23
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Veeramanikandan RAJU , Anand Kumar G , Prachi MISHRA
Abstract: A computing device, including a processor; a memory, wherein the memory is accessible for memory operations via a range of logical memory addresses; a peripheral interface including a first control register; and a peripheral address remapping module configured to determine that the peripheral interface is unused for interfacing with a peripheral; determine a first memory address for accessing the first control register; determine a first logical memory address, the first logical memory address outside of the range of logical memory addresses for accessing the memory; and map the first logical memory address to the first memory address, wherein the first control register is accessible for memory operations using the first logical memory address.
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