公开(公告)号：US10809978B2

公开(公告)日：2020-10-20

申请号：US15995647

申请日：2018-06-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Arthur John Redfern ,  Asheesh Bhardwaj ,  Tarek Aziz Lahlou ,  William Franklin Leven

IPC: G06F16/00 ,  G06F7/36 ,  G06F9/30 ,  G06F7/32 ,  G06F7/24 ,  G06F7/16 ,  G06F16/28

Abstract: A merge sort accelerator (MSA) includes a pre-processing stage configured to receive an input vector and generate a pre-processing output vector based on a pre-processing instruction and the input vector. The MSA also includes a merge sort network having multiple sorting stages configured to be selectively enabled. The merge sort network is configured to receive the pre-processing output vector and generate a sorted output vector based on a sorting instruction and the pre-processing output vector. The MSA includes an accumulator stage configured to receive the sorted output vector and update an accumulator vector based on the accumulator instruction and the sorted output vector. The MSA also includes a post-processing stage configured to receive the accumulator vector and generate a post-processing output vector based on a post-processing instruction and the accumulator vector.

公开(公告)号：US11694341B2

公开(公告)日：2023-07-04

申请号：US16725296

申请日：2019-12-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jing Li ,  Do-Kyoung Kwon ,  Tarek Aziz Lahlou

IPC: G06T7/223 ,  G06T7/285 ,  H04N13/106 ,  G06N3/02 ,  H04N13/00

CPC classification number: G06T7/223 ,  G06N3/02 ,  G06T7/285 ,  H04N13/106 ,  G06T2207/10021 ,  G06T2207/20084 ,  H04N2013/0081 ,  H04N2013/0085

Abstract: A CNN operates on the disparity or motion outputs of a block matching hardware module, such as a DMPAC module, to produce refined disparity or motion streams which improve operations in images having ambiguous regions. As the block matching hardware module provides most of the processing, the CNN can be small and thus able to operate in real time, in contrast to CNNs which are performing all of the processing. In one example, the CNN operation is performed only if the block hardware module output confidence level is below a predetermined amount. The CNN can have a number of different configurations and still be sufficiently small to operate in real time on conventional platforms.

公开(公告)号：US10452960B1

公开(公告)日：2019-10-22

申请号：US16147966

申请日：2018-10-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yingmao Li ,  Vikram VijayanBabu Appia ,  Ziguo Zhong ,  Tarek Aziz Lahlou

IPC: G06K9/62 ,  G06N7/00 ,  G06N3/08 ,  G06T1/20 ,  G06K9/46

Abstract: An image classification system includes a convolutional neural network, a confidence predictor, and a fusion classifier. The convolutional neural network is configured to assign a plurality of probability values to each pixel of a first image of a scene and a second image of the scene. Each of the probability values corresponds to a different feature that the convolutional neural network is trained to identify. The confidence predictor is configured to assign a confidence value to each pixel of the first image and to each pixel of the second image. The confidence values correspond to a greatest of the probability values generated by the convolutional neural network for each pixel. The fusion classifier is configured to assign, to each pixel of the first image, a feature that corresponds to a higher of the confidence values assigned to the pixel of the first image and the second image.

公开(公告)号：US10810281B2

公开(公告)日：2020-10-20

申请号：US16057667

申请日：2018-08-07

Applicant: Texas Instruments Incorporated

Inventor： Arthur John Redfern ,  Donald Edward Steiss ,  Mihir Narendra Mody ,  Tarek Aziz Lahlou

IPC: G06F17/16 ,  G06F9/30 ,  G06F7/78 ,  G06F7/544

Abstract: An outer product multiplier (GPM) system/method that integrates compute gating and input/output circular column rotation functions to balance time spent in compute and data transfer operations while limiting overall dynamic power dissipation is disclosed. Matrix compute gating (MCG) based on a computation decision matrix (CDM) limits the number of computations required on a per cycle basis to reduce overall matrix compute cycle power dissipation. A circular column rotation vector (CRV) automates input/output data formatting to reduce the number of data transfer operations required to achieve a given matrix computation result. Matrix function operators (MFO) utilizing these features are disclosed and include: matrix-matrix multiplication; matrix-matrix and vector-vector point-wise multiplication, addition, and assignment; matrix-vector multiplication; vector-vector inner product; matrix transpose; matrix row permute; and vector-column permute.

公开(公告)号：US20180373678A1

公开(公告)日：2018-12-27

申请号：US16057667

申请日：2018-08-07

Applicant: Texas Instruments Incorporated

Inventor： Arthur John Redfern ,  Donald Edward Steiss ,  Mihir Narendra Mody ,  Tarek Aziz Lahlou

IPC: G06F17/16 ,  G06F7/78 ,  G06F9/30

Abstract: An outer product multiplier (GPM) system/method that integrates compute gating and input/output circular column rotation functions to balance time spent in compute and data transfer operations while limiting overall dynamic power dissipation is disclosed. Matrix compute gating (MCG) based on a computation decision matrix (CDM) limits the number of computations required on a per cycle basis to reduce overall matrix compute cycle power dissipation. A circular column rotation vector (CRV) automates input/output data formatting to reduce the number of data transfer operations required to achieve a given matrix computation result. Matrix function operators (MFO) utilizing these features are disclosed and include: matrix-matrix multiplication; matrix-matrix and vector-vector point-wise multiplication, addition, and assignment; matrix-vector multiplication; vector-vector inner product; matrix transpose; matrix row permute; and vector-column permute.