公开(公告)号：US20230275442A1

公开(公告)日：2023-08-31

申请号：US18313658

申请日：2023-05-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Mustapha EL MARKHI ,  Alejandro VERA ,  Tonmoy ROY ,  Rohit BHAN

IPC: H02J7/00

CPC classification number: H02J7/0031 ,  H02J7/00 ,  H02J7/00302 ,  H02J7/00304

Abstract: Aspects of the disclosure provide for a circuit. In at least some examples, the circuit includes a logic circuit, a first comparator, a second comparator, and an AND logic circuit. The logic circuit has an output and the first comparator has a first input coupled to an input voltage (VIN) pin, a second input configured to receive a Vin under voltage lockout (VINUVLO) threshold value, and an output. The second comparator has a first input coupled to a power middle (PMID) pin, a second input coupled to a battery pin, and an output and the AND logic circuit has a first input coupled to the output of the logic circuit, a second input coupled to the output of the first comparator, a third input coupled to the output of the second comparator, and an output coupled to an input of a field-effect transistor (FET) control circuit.