公开(公告)号：US20210311121A1

公开(公告)日：2021-10-07

申请号：US17353882

申请日：2021-06-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Prakash NARAYANAN ,  Wilson PRADEEP

IPC: G01R31/3185 ,  G01R31/317 ,  G01R31/3177

Abstract: A circuit device is provided with a first codec including a first portion of a logic circuit and a second codec including a second portion of the logic circuit. The circuit device can also include a plurality of first scan chains coupled to the first codec and configured to shift a delayed test vector onto the first codec, wherein the delayed test vector is a test vector with a phase delay. A plurality of second scan chains can be coupled to the second codec and configured to shift the test vector onto the second codec.