公开(公告)号：US12292694B2

公开(公告)日：2025-05-06

申请号：US17460580

申请日：2021-08-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Chung Chien ,  Chih-Chieh Yang ,  Hao-Ken Hung ,  Ming-Feng Shieh

IPC: G03F7/00 ,  H01L21/66 ,  H01L23/544

Abstract: A device includes a diffraction-based overlay (DBO) mark having an upper-layer pattern disposed over a lower-layer pattern, and having smallest dimension greater than about 5 micrometers. The device further includes a calibration mark having an upper-layer pattern disposed over a lower-layer pattern, positioned substantially at a center of the DBO mark, and having smallest dimension less than about ⅕ the size of the smallest dimension of the DBO mark.

公开(公告)号：US11287746B1

公开(公告)日：2022-03-29

申请号：US17197707

申请日：2021-03-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hung-Chung Chien ,  Hao-Ken Hung ,  Chih-Chieh Yang ,  Ming-Feng Shieh ,  Chun-Ming Hu

IPC: G03F7/20

Abstract: Semiconductor processing apparatuses and methods are provided in which a semiconductor wafer is flipped and then rotated between patterning of front and back sides of the semiconductor wafer by first and second reticles, respectively. In some embodiments, a method includes patterning, by a first reticle, a first layer on a first side of a semiconductor wafer while the first side of the semiconductor wafer is facing a first direction. The semiconductor wafer is then flipped. A second side of the semiconductor wafer that is opposite the first side faces the first direction after the flipping the semiconductor wafer. The semiconductor wafer is then rotated about a rotational axis extending along the first direction, and a second layer on the second side of the semiconductor wafer is patterned by a second reticle.