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公开(公告)号:US20240395545A1
公开(公告)日:2024-11-28
申请号:US18788641
申请日:2024-07-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Min-Sung Kuo , I-Kai Hung , Po-Wei Chen , Chung-Cheng Chen
IPC: H01L21/02 , H01L21/027 , H01L21/768
Abstract: Semiconductor devices and methods of manufacture are provided whereby fences are formed over a substrate and III-V materials are grown over the substrate, wherein the fences block growth of the III-V materials. As such, smaller areas of the III-V materials are grown, thereby preventing stresses that occur with the growth of larger sheets.
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公开(公告)号:US11195737B2
公开(公告)日:2021-12-07
申请号:US16577259
申请日:2019-09-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ming-Sung Kuo , Jhih-Yuan Yang , Po-Wei Chen , Fang-yu Liu , Ping-Cheng Ko , Chung-Cheng Chen
IPC: H01L21/673
Abstract: An apparatus for storing and transporting semiconductor elements includes a first portion and a second portion. The first portion includes a first front side wall, a first rear side wall, a top wall, and at least one pin holder integrally extending from the first rear side wall. The second portion includes a second front side wall, a second rear side wall, a bottom wall, and at least one pivotal pin structure integrally coupled with and extending from the second rear side wall. The at least one pivotal pin structure comprises a shaft, and a head connected with the shaft. The at least one pin holder defines a cavity sized and shaped to accept the head of the at least one pivotal pin structure. The first portion and the second portion are pivotally movable between an open configuration and a closed container configuration.
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公开(公告)号:US11114543B2
公开(公告)日:2021-09-07
申请号:US15460582
申请日:2017-03-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ming-Hong Chang , Chih-Yuan Chan , Shen-Ping Wang , Chung-Cheng Chen , Chien-Li Kuo , Po-Tao Chu
IPC: H01L29/417 , H01L29/78 , H01L29/66 , H01L29/10 , H01L29/778 , H01L21/768 , H01L21/74 , H01L29/423 , H01L23/31 , H01L23/532 , H01L23/522 , H01L29/20
Abstract: A group III-V device structure is provided. The group III-V device structure includes a channel layer formed over a substrate and an active layer formed over the channel layer. The group III-V device structure also includes a gate structure formed over the active layer and a source electrode and a drain electrode formed over the active layer. The source electrode and the drain electrode are formed on opposite sides of the gate structure. The group III-V device structure further includes a through via structure formed through the channel layer, the active layer and a portion of the substrate, and the through via structure is electrically connected to the source electrode or the drain electrode.
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公开(公告)号:US20230065555A1
公开(公告)日:2023-03-02
申请号:US17462284
申请日:2021-08-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Min-Sung Kuo , I-Kai Hung , Po-Wei Chen , Chung-Cheng Chen
IPC: H01L21/02 , H01L21/768 , H01L21/027
Abstract: Semiconductor devices and methods of manufacture are provided whereby fences are formed over a substrate and III-V materials are grown over the substrate, wherein the fences block growth of the III-V materials. As such, smaller areas of the III-V materials are grown, thereby preventing stresses that occur with the growth of larger sheets.
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公开(公告)号:US12217960B2
公开(公告)日:2025-02-04
申请号:US17462284
申请日:2021-08-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Min-Sung Kuo , I-Kai Hung , Po-Wei Chen , Chung-Cheng Chen
IPC: H01L21/02 , H01L21/027 , H01L21/768
Abstract: Semiconductor devices and methods of manufacture are provided whereby fences are formed over a substrate and III-V materials are grown over the substrate, wherein the fences block growth of the III-V materials. As such, smaller areas of the III-V materials are grown, thereby preventing stresses that occur with the growth of larger sheets.
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公开(公告)号:US10163707B2
公开(公告)日:2018-12-25
申请号:US15599706
申请日:2017-05-19
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ming-Hong Chang , Hsin-Chih Lin , Shen-Ping Wang , Chung-Cheng Chen , Chien-Li Kuo , Po-Tao Chu
IPC: H01L21/768 , H01L29/778 , H01L29/66 , H01L29/20 , H01L23/48
Abstract: Methods for forming a group III-V device structure are provided. A method includes forming a first through via structure penetrating through group III-V compound layers over a front surface of a semiconductor substrate. The method also includes thinning the semiconductor substrate from a back surface of the semiconductor substrate. The method further includes etching the semiconductor substrate from the back surface to form a via hole substantially aligned with the first through via structure. In addition, the method includes etching the semiconductor substrate from the back surface to form a recess extending from a bottom surface of the recess towards the first through via structure. The first through via structure is exposed by the via hole and the recess. The method also includes forming a conductive layer in the via hole and the recess to form a second through via structure connected to the first through via structure.
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公开(公告)号:US20180337228A1
公开(公告)日:2018-11-22
申请号:US15598644
申请日:2017-05-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ming-Hong CHANG , Po-Tao Chu , Shen-Ping Wang , Chien-Li Kuo , Chung-Cheng Chen
IPC: H01L29/06 , H01L29/20 , H01L23/48 , H01L21/768
Abstract: A semiconductor device includes a substrate, overlaid by a III-V compound semiconductor layer. The substrate includes a circuit region and a seal ring region, wherein the seal ring region surrounds the circuit region. A seal ring structure is disposed in the seal ring region, wherein the seal ring structure includes a first via structure, extending through part of the substrate and the III-V compound semiconductor layer, that surrounds the circuit region.
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