公开(公告)号：US20210249079A1

公开(公告)日：2021-08-12

申请号：US16785997

申请日：2020-02-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Han-Jong CHIA ,  Sai-Hooi YEONG ,  Yu-Ming LIN

IPC: G11C14/00 ,  G11C11/22 ,  G11C11/419 ,  H01L27/11507 ,  H01L27/11 ,  H01L27/1159

Abstract: Memories are provided. A memory includes a plurality of ferroelectric random access memory (FRAM) cells arranged in a first memory array, and a plurality of static random access memory (SRAM) cells arranged in a second memory array. There are more FRAM cells than SRAM cells. The first memory array and the second memory array share the same bus.

公开(公告)号：US20220013532A1

公开(公告)日：2022-01-13

申请号：US16924903

申请日：2020-07-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Bo-Feng YOUNG ,  Sai-Hooi YEONG ,  Chih-Yu CHANG ,  Han-Jong CHIA ,  Chenchen Jacob WANG ,  Yu-Ming LIN

IPC: H01L27/11556 ,  H01L27/11521 ,  H01L29/423 ,  H01L29/06 ,  G11C16/08 ,  G11C16/24

Abstract: Three-dimensional memories are provided. A three-dimensional memory includes a plurality of memory cells, a plurality of word lines, a plurality of bit lines and a plurality of source lines. The memory cells are divided into a plurality of groups, and the groups of memory cells are formed in respective levels stacked along a first direction. The word lines extend along a second direction, and the second direction is perpendicular to the first direction. Each of the bit lines includes a plurality of sub-bit lines formed in the respective levels. Each of the source lines includes a plurality of sub-source lines formed in respective levels. In each of the levels, the memory cells of the corresponding group are arranged in a plurality of columns, and the sub-bit lines and the sub-source lines are alternately arranged between two adjacent columns.