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公开(公告)号:US20210013343A1
公开(公告)日:2021-01-14
申请号:US17031530
申请日:2020-09-24
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Gulbagh SINGH , Hsin-Chu CHEN , Kun-Tsang CHUANG
IPC: H01L29/78 , H01L21/762 , H01L21/02 , H01L21/3065 , H01L21/265
Abstract: The present disclosure describes a method that mitigates the formation of facets in source/drain silicon germanium (SiGe) epitaxial layers. The method includes forming an isolation region around a semiconductor layer and a gate structure partially over the semiconductor layer and the isolation region. Disposing first photoresist structures over the gate structure, a portion of the isolation region, and a portion of the semiconductor layer and doping, with germanium (Ge), exposed portions of the semiconductor layer and exposed portions of the isolation region to form Ge-doped regions that extend from the semiconductor layer to the isolation region. The method further includes disposing second photoresist structures over the isolation region and etching exposed Ge-doped regions in the semiconductor layer to form openings, where the openings include at least one common sidewall with the Ge-doped regions in the isolation region. Finally the method includes growing a SiGe epitaxial stack in the openings.