公开(公告)号：US11610823B2

公开(公告)日：2023-03-21

申请号：US16673794

申请日：2019-11-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tong-Min Weng ,  Tsung-Han Wu

IPC: H01L29/06 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/28 ,  H01L21/02 ,  H01L29/49 ,  H01L21/3115 ,  H01L29/66 ,  H01L27/092 ,  H01L29/78

Abstract: A semiconductor device includes: at least one gate structure comprising a gate electrode over a substrate, the gate electrode comprising a conductive material; and a first dielectric layer disposed along one or more side wall of the at least one gate structure, the first dielectric layer comprising fluorine doped silicon oxycarbonitride or fluorine doped silicon oxycarbide.

公开(公告)号：US10651296B2

公开(公告)日：2020-05-12

申请号：US16048904

申请日：2018-07-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Tsung-Han Wu ,  Tong-Min Weng ,  Chun-Yi Huang ,  Po-Ching Lee ,  Chih-Hsuan Hsieh ,  Shu-Ching Tsai

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/02 ,  H01L21/324 ,  H01L21/265

Abstract: Methods of fabricating FinFET devices are provided. The method includes forming a fin over a substrate. The method also includes implanting a first dopant on a top surface of the fin and implanting a second dopant on a sidewall surface of the fin. The first dopant is different from the second dopant. The method further includes forming an oxide layer on the top surface and the sidewall surface of the fin, and forming a gate electrode layer over the oxide layer.

公开(公告)号：US10256233B2

公开(公告)日：2019-04-09

申请号：US15883899

申请日：2018-01-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Huan-Kuan Su ,  Yu-Hong Pan ,  Jen-Pan Wang ,  Tong-Min Weng ,  Tsung-Han Wu

IPC: H01L27/06 ,  H01L49/02

Abstract: A method for forming a semiconductor device and the resulting device are provided. At least one capacitor in a first gate structure is formed over a substrate. The at least one capacitor includes a first gate electrode including a first conductive layer, a semiconductor layer including a semiconductor material and a dopant, a dielectric layer disposed between the first gate electrode and the semiconductor layer, and a second conductive layer contacting the semiconductor layer. The at least one resistor includes a third conductive layer and is electrically connected to the at least one capacitor.

公开(公告)号：US20180342502A1

公开(公告)日：2018-11-29

申请号：US15883899

申请日：2018-01-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Huan-Kuan Su ,  Yu-Hong Pan ,  Jen-Pan Wang ,  Tong-Min Weng ,  Tsung-Han Wu

IPC: H01L27/06 ,  H01L49/02

CPC classification number: H01L27/0629 ,  H01L28/20 ,  H01L28/60

Abstract: A method for forming a semiconductor device and the resulting device are provided. At least one capacitor in a first gate structure is formed over a substrate. The at least one capacitor includes a first gate electrode including a first conductive layer, a semiconductor layer including a semiconductor material and a dopant, a dielectric layer disposed between the first gate electrode and the semiconductor layer, and a second conductive layer contacting the semiconductor layer. The at least one resistor includes a third conductive layer and is electrically connected to the at least one capacitor.