公开(公告)号：US20210082771A1

公开(公告)日：2021-03-18

申请号：US16572109

申请日：2019-09-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wan-Yi KAO ,  Chung-Chi KO ,  Wei-Jin LI

IPC: H01L21/8234 ,  H01L27/088 ,  H01L21/762 ,  H01L21/3105

Abstract: A method for forming a semiconductor structure is provided. The method includes patterning a semiconductor substrate to form a first semiconductor fin and a second semiconductor fin, and depositing a first dielectric material on the first and second semiconductor fins. There is a trench between the first and second semiconductor fins. The method also includes depositing a semiconductor material on the first dielectric material, heating the semiconductor material to cause the semiconductor material to flow to a bottom region of the trench, filling a top region of the trench with a second dielectric material, and heating the first dielectric material, the second dielectric material, and the semiconductor material to form an isolation structure between the first and second semiconductor fins.

公开(公告)号：US20230290853A1

公开(公告)日：2023-09-14

申请号：US17836740

申请日：2022-06-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Jin LI ,  Che-Hao CHANG ,  Zhen-Cheng WU ,  Chi On CHUI

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/786 ,  H01L21/762 ,  H01L21/3115

CPC classification number: H01L29/42392 ,  H01L29/0665 ,  H01L29/78696 ,  H01L21/76224 ,  H01L21/31155

Abstract: A semiconductor device with doped shallow trench isolation (STI) structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure with first and second nanostructured layers arranged in an alternating configuration on the fin structure, depositing an oxide liner surrounding the superlattice structure and the fin structure in a first deposition process, forming a dopant source liner on the oxide liner, depositing an oxide fill layer on the dopant source liner in a second deposition process different from the first deposition process, performing a doping process to form a doped oxide liner and a doped oxide fill layer, removing portions of the doped oxide liner, the doped oxide fill layer, and the dopant source liner from sidewalls of the superlattice structure, and forming a gate structure on the fin structure and surrounding the first nanostructured layers.