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公开(公告)号:US20220336614A1
公开(公告)日:2022-10-20
申请号:US17231925
申请日:2021-04-15
Inventor: Chih-Ching Wang , Chung-I Yang , Jon-Hsu Ho , Wen-Hsing Hsieh , Chung-Wei Wu , Zhiqiang Wu
IPC: H01L29/45 , H01L29/06 , H01L29/423 , H01L29/786 , H01L21/02 , H01L21/285 , H01L21/306 , H01L21/764 , H01L29/66
Abstract: Source/drain silicide that improves performance and methods for fabricating such are disclosed herein. An exemplary device includes a first channel layer disposed over a substrate, a second channel layer disposed over the first channel layer, and a gate stack that surrounds the first channel layer and the second channel layer. A source/drain feature disposed adjacent the first channel layer, second channel layer, and gate stack. The source/drain feature is disposed over first facets of the first channel layer and second facets of the second channel layer. The first facets and the second facets have a (111) crystallographic orientation. An inner spacer disposed between the gate stack and the source/drain feature and between the first channel layer and the second channel layer. A silicide feature is disposed over the source/drain feature where the silicide feature extends into the source/drain feature towards the substrate to a depth of the first channel layer.
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公开(公告)号:US20230369495A1
公开(公告)日:2023-11-16
申请号:US18357832
申请日:2023-07-24
Inventor: Yu-Shan Lu , Chung-I Yang , Kuo-Yi Chao , Wen-Hsing Hsieh , Jiun-Ming Kuo , Chih-Ching Wang , Yuan-Ching Peng
IPC: H01L29/78 , H01L29/66 , H01L29/423
CPC classification number: H01L29/785 , H01L29/66545 , H01L29/42392 , H01L29/6681 , H01L2029/7858
Abstract: A semiconductor device according to the present disclosure includes a dielectric fin having a helmet layer, a gate structure disposed over a first portion of the helmet layer and extending along a direction, and a dielectric layer adjacent the gate structure and disposed over a second portion of the helmet layer. A width of the first portion along the direction is greater than a width of the second portion along the direction.
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公开(公告)号:US20220115530A1
公开(公告)日:2022-04-14
申请号:US17069409
申请日:2020-10-13
Inventor: Yu-Shan Lu , Chung-I Yang , Kuo-Yi Chao , Wen-Hsing Hsieh , Jiun-Ming Kuo , Chih-Ching Wang , Yuan-Ching Peng
IPC: H01L29/78 , H01L29/66 , H01L29/423
Abstract: A semiconductor device according to the present disclosure includes a dielectric fin having a helmet layer, a gate structure disposed over a first portion of the helmet layer and extending along a direction, and a dielectric layer adjacent the gate structure and disposed over a second portion of the helmet layer. A width of the first portion along the direction is greater than a width of the second portion along the direction.
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公开(公告)号:US12218214B2
公开(公告)日:2025-02-04
申请号:US17231925
申请日:2021-04-15
Inventor: Chih-Ching Wang , Chung-I Yang , Jon-Hsu Ho , Wen-Hsing Hsieh , Chung-Wei Wu , Zhiqiang Wu
IPC: H01L29/45 , H01L21/02 , H01L21/285 , H01L21/306 , H01L21/764 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/786
Abstract: Source/drain silicide that improves performance and methods for fabricating such are disclosed herein. An exemplary device includes a first channel layer disposed over a substrate, a second channel layer disposed over the first channel layer, and a gate stack that surrounds the first channel layer and the second channel layer. A source/drain feature disposed adjacent the first channel layer, second channel layer, and gate stack. The source/drain feature is disposed over first facets of the first channel layer and second facets of the second channel layer. The first facets and the second facets have a (111) crystallographic orientation. An inner spacer disposed between the gate stack and the source/drain feature and between the first channel layer and the second channel layer. A silicide feature is disposed over the source/drain feature where the silicide feature extends into the source/drain feature towards the substrate to a depth of the first channel layer.
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公开(公告)号:US11735665B2
公开(公告)日:2023-08-22
申请号:US17811428
申请日:2022-07-08
Inventor: Yu-Shan Lu , Chung-I Yang , Kuo-Yi Chao , Wen-Hsing Hsieh , Jiun-Ming Kuo , Chih-Ching Wang , Yuan-Ching Peng
IPC: H01L29/78 , H01L29/66 , H01L29/423
CPC classification number: H01L29/785 , H01L29/42392 , H01L29/6681 , H01L29/66545 , H01L2029/7858
Abstract: A semiconductor device according to the present disclosure includes a dielectric fin having a helmet layer, a gate structure disposed over a first portion of the helmet layer and extending along a direction, and a dielectric layer adjacent the gate structure and disposed over a second portion of the helmet layer. A width of the first portion along the direction is greater than a width of the second portion along the direction.
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公开(公告)号:US12230712B2
公开(公告)日:2025-02-18
申请号:US18357832
申请日:2023-07-24
Inventor: Yu-Shan Lu , Chung-I Yang , Kuo-Yi Chao , Wen-Hsing Hsieh , Jiun-Ming Kuo , Chih-Ching Wang , Yuan-Ching Peng
IPC: H01L29/78 , H01L29/423 , H01L29/66
Abstract: A semiconductor device according to the present disclosure includes a dielectric fin having a helmet layer, a gate structure disposed over a first portion of the helmet layer and extending along a direction, and a dielectric layer adjacent the gate structure and disposed over a second portion of the helmet layer. A width of the first portion along the direction is greater than a width of the second portion along the direction.
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7.
公开(公告)号:US20230387240A1
公开(公告)日:2023-11-30
申请号:US18447183
申请日:2023-08-09
Inventor: Chih-Ching Wang , Chung-I Yang , Jon-Hsu Ho , Wen-Hsing Hsieh , Chung-Wei Wu , Zhiqiang Wu
IPC: H01L29/45 , H01L29/06 , H01L29/423 , H01L29/786 , H01L29/66 , H01L21/285 , H01L21/306 , H01L21/764 , H01L21/02
CPC classification number: H01L29/45 , H01L29/0653 , H01L29/0665 , H01L29/42392 , H01L29/78618 , H01L29/78696 , H01L21/0259 , H01L21/28518 , H01L21/30604 , H01L21/764 , H01L29/66545 , H01L29/66636 , H01L29/66553 , H01L29/66742
Abstract: Source/drain silicide that improves performance and methods for fabricating such are disclosed herein. An exemplary device includes a first channel layer disposed over a substrate, a second channel layer disposed over the first channel layer, and a gate stack that surrounds the first channel layer and the second channel layer. A source/drain feature disposed adjacent the first channel layer, second channel layer, and gate stack. The source/drain feature is disposed over first facets of the first channel layer and second facets of the second channel layer. The first facets and the second facets have a (111) crystallographic orientation. An inner spacer disposed between the gate stack and the source/drain feature and between the first channel layer and the second channel layer. A silicide feature is disposed over the source/drain feature where the silicide feature extends into the source/drain feature towards the substrate to a depth of the first channel layer.
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公开(公告)号:US20220344502A1
公开(公告)日:2022-10-27
申请号:US17811428
申请日:2022-07-08
Inventor: Yu-Shan Lu , Chung-I Yang , Kuo-Yi Chao , Wen-Hsing Hsieh , Jiun-Ming Kuo , Chih-Ching Wang , Yuan-Ching Peng
IPC: H01L29/78 , H01L29/66 , H01L29/423
Abstract: A semiconductor device according to the present disclosure includes a dielectric fin having a helmet layer, a gate structure disposed over a first portion of the helmet layer and extending along a direction, and a dielectric layer adjacent the gate structure and disposed over a second portion of the helmet layer. A width of the first portion along the direction is greater than a width of the second portion along the direction.
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