公开(公告)号：US11205713B2

公开(公告)日：2021-12-21

申请号：US16206464

申请日：2018-11-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tzu-Ching Lin ,  Chien-I Kuo ,  Wei Te Chiang ,  Wei Hao Lu ,  Li-Li Su ,  Chii-Horng Li

IPC分类号： H01L29/66 ,  H01L29/167 ,  H01L29/78 ,  H01L27/088 ,  H01L29/161 ,  H01L21/461 ,  H01L29/08 ,  H01L29/26 ,  H01L29/06

摘要： An embodiment is a method including forming a raised portion of a substrate, forming fins on the raised portion of the substrate, forming an isolation region surrounding the fins, a first portion of the isolation region being on a top surface of the raised portion of the substrate between adjacent fins, forming a gate structure over the fins, and forming source/drain regions on opposing sides of the gate structure, wherein forming the source/drain regions includes epitaxially growing a first epitaxial layer on the fin adjacent the gate structure, etching back the first epitaxial layer, epitaxially growing a second epitaxial layer on the etched first epitaxial layer, and etching back the second epitaxial layer, the etched second epitaxial layer having a non-faceted top surface, the etched first epitaxial layer and the etched second epitaxial layer forming source/drain regions.

公开(公告)号：US11600715B2

公开(公告)日：2023-03-07

申请号：US16659124

申请日：2019-10-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tzu-Ching Lin ,  Chien-I Kuo ,  Wei Te Chiang ,  Wei Hao Lu ,  Li-Li Su ,  Chii-Horng Li

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/167 ,  H01L27/088 ,  H01L29/161 ,  H01L21/461 ,  H01L29/08 ,  H01L29/26 ,  H01L29/06

摘要： An embodiment is a method including forming a raised portion of a substrate, forming fins on the raised portion of the substrate, forming an isolation region surrounding the fins, a first portion of the isolation region being on a top surface of the raised portion of the substrate between adjacent fins, forming a gate structure over the fins, and forming source/drain regions on opposing sides of the gate structure, wherein forming the source/drain regions includes epitaxially growing a first epitaxial layer on the fin adjacent the gate structure, etching back the first epitaxial layer, epitaxially growing a second epitaxial layer on the etched first epitaxial layer, and etching back the second epitaxial layer, the etched second epitaxial layer having a non-faceted top surface, the etched first epitaxial layer and the etched second epitaxial layer forming source/drain regions.

公开(公告)号：US20190109217A1

公开(公告)日：2019-04-11

申请号：US16206464

申请日：2018-11-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tzu-Ching Lin ,  Chien-I Kuo ,  Wei Te Chiang ,  Wei Hao Lu ,  Li-Li Su ,  Chii-Horng Li

IPC分类号： H01L29/66 ,  H01L29/167 ,  H01L29/26 ,  H01L29/08 ,  H01L21/461 ,  H01L29/78 ,  H01L29/06

摘要： An embodiment is a method including forming a raised portion of a substrate, forming fins on the raised portion of the substrate, forming an isolation region surrounding the fins, a first portion of the isolation region being on a top surface of the raised portion of the substrate between adjacent fins, forming a gate structure over the fins, and forming source/drain regions on opposing sides of the gate structure, wherein forming the source/drain regions includes epitaxially growing a first epitaxial layer on the fin adjacent the gate structure, etching back the first epitaxial layer, epitaxially growing a second epitaxial layer on the etched first epitaxial layer, and etching back the second epitaxial layer, the etched second epitaxial layer having a non-faceted top surface, the etched first epitaxial layer and the etched second epitaxial layer forming source/drain regions.

公开(公告)号：US20180151703A1

公开(公告)日：2018-05-31

申请号：US15640645

申请日：2017-07-03

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tzu-Ching Lin ,  Chien-I Kuo ,  Wei Te Chiang ,  Wei Hao Lu ,  Li-Li Su ,  Chii-Horng Li

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/08 ,  H01L21/461 ,  H01L29/26

摘要： An embodiment is a method including forming a raised portion of a substrate, forming fins on the raised portion of the substrate, forming an isolation region surrounding the fins, a first portion of the isolation region being on a top surface of the raised portion of the substrate between adjacent fins, forming a gate structure over the fins, and forming source/drain regions on opposing sides of the gate structure, wherein forming the source/drain regions includes epitaxially growing a first epitaxial layer on the fin adjacent the gate structure, etching back the first epitaxial layer, epitaxially growing a second epitaxial layer on the etched first epitaxial layer, and etching back the second epitaxial layer, the etched second epitaxial layer having a non-faceted top surface, the etched first epitaxial layer and the etched second epitaxial layer forming source/drain regions.

公开(公告)号：US20200052098A1

公开(公告)日：2020-02-13

申请号：US16659124

申请日：2019-10-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tzu-Ching Lin ,  Chien-I Kuo ,  Wei Te Chiang ,  Wei Hao Lu ,  Li-Li Su ,  Chii-Horng Li

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/26 ,  H01L29/08 ,  H01L21/461 ,  H01L29/167 ,  H01L29/161 ,  H01L27/088

摘要： An embodiment is a method including forming a raised portion of a substrate, forming fins on the raised portion of the substrate, forming an isolation region surrounding the fins, a first portion of the isolation region being on a top surface of the raised portion of the substrate between adjacent fins, forming a gate structure over the fins, and forming source/drain regions on opposing sides of the gate structure, wherein forming the source/drain regions includes epitaxially growing a first epitaxial layer on the fin adjacent the gate structure, etching back the first epitaxial layer, epitaxially growing a second epitaxial layer on the etched first epitaxial layer, and etching back the second epitaxial layer, the etched second epitaxial layer having a non-faceted top surface, the etched first epitaxial layer and the etched second epitaxial layer forming source/drain regions.

公开(公告)号：US10453943B2

公开(公告)日：2019-10-22

申请号：US15640645

申请日：2017-07-03

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tzu-Ching Lin ,  Chien-I Kuo ,  Wei Te Chiang ,  Wei Hao Lu ,  Li-Li Su ,  Chii-Horng Li

IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L29/26 ,  H01L29/66 ,  H01L29/78 ,  H01L21/461 ,  H01L29/167

摘要： An embodiment is a method including forming a raised portion of a substrate, forming fins on the raised portion of the substrate, forming an isolation region surrounding the fins, a first portion of the isolation region being on a top surface of the raised portion of the substrate between adjacent fins, forming a gate structure over the fins, and forming source/drain regions on opposing sides of the gate structure, wherein forming the source/drain regions includes epitaxially growing a first epitaxial layer on the fin adjacent the gate structure, etching back the first epitaxial layer, epitaxially growing a second epitaxial layer on the etched first epitaxial layer, and etching back the second epitaxial layer, the etched second epitaxial layer having a non-faceted top surface, the etched first epitaxial layer and the etched second epitaxial layer forming source/drain regions.