公开(公告)号：US20200227133A1

公开(公告)日：2020-07-16

申请号：US16829149

申请日：2020-03-25

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Yi-Chun Shih ,  Po-Hao Lee ,  Chia-Fu Lee ,  Yu-Der Chih ,  Yu-Lin Chen

IPC: G11C29/00 ,  G11C29/44 ,  G06F12/02

Abstract: Memory devices and methods of repairing a memory are provided. A first array includes normal memory cells, and a second array includes repair memory cells. The repair memory cells are configured to be used in place of the normal memory cells. A look-up table comprises memory bitcells configured to store a set of entries including addresses of defective memory cells of the normal memory cells. A match circuit is configured to evaluate whether an input memory address is stored as a defective address in the memory bitcells. The match circuit is also configured to generate a selection signal for selecting the normal memory cells or the repair memory cells based on the evaluation.

公开(公告)号：US11211142B2

公开(公告)日：2021-12-28

申请号：US16829149

申请日：2020-03-25

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Yi-Chun Shih ,  Po-Hao Lee ,  Chia-Fu Lee ,  Yu-Der Chih ,  Yu-Lin Chen

IPC: G11C16/06 ,  G11C29/00 ,  G11C29/44 ,  G06F12/02

Abstract: Memory devices and methods of repairing a memory are provided. A first array includes normal memory cells, and a second array includes repair memory cells. The repair memory cells are configured to be used in place of the normal memory cells. A look-up table comprises memory bitcells configured to store a set of entries including addresses of defective memory cells of the normal memory cells. A match circuit is configured to evaluate whether an input memory address is stored as a defective address in the memory bitcells. The match circuit is also configured to generate a selection signal for selecting the normal memory cells or the repair memory cells based on the evaluation.

公开(公告)号：US20190035487A1

公开(公告)日：2019-01-31

申请号：US16044621

申请日：2018-07-25

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Yi-Chun Shih ,  Po-Hao Lee ,  Chia-Fu Lee ,  Yu-Der Chih ,  Yu-Lin Chen

IPC: G11C29/00 ,  G11C29/44 ,  G06F12/02

Abstract: Memory devices and methods of repairing a memory are provided. A first array includes normal memory cells, and a second array includes repair memory cells. The repair memory cells are configured to be used in place of the normal memory cells. A look-up table comprises memory bitcells configured to store a set of entries including addresses of defective memory cells of the normal memory cells. A match circuit is configured to evaluate whether an input memory address is stored as a defective address in the memory bitcells. The match circuit is also configured to generate a selection signal for selecting the normal memory cells or the repair memory cells based on the evaluation.