Method and apparatus for conversion of radio frequency (RF) signals using aperiodic mixing signals
    1.
    发明授权
    Method and apparatus for conversion of radio frequency (RF) signals using aperiodic mixing signals 失效
    使用非周期性混合信号转换射频(RF)信号的方法和装置

    公开(公告)号:US07164897B2

    公开(公告)日:2007-01-16

    申请号:US10486830

    申请日:2002-08-28

    IPC分类号: H04B1/18

    摘要: An inexpensive, high-performance, fully-integrable, multi-standard transceiver with a topology including: an active mixer, followed by a high pass filter, and a passive mixer. The input signal is modulated up, or demodulated down, using a pair of complementary, aperiodic mixing signals. The use of aperiodic mixing signals allows a fully-integrated transceiver to be built. Embodiments of the active mixer include those having electrically-adjustable performance and allowing multiple RF signal inputs. This allows the topology to be employed in multi-band, multi-frequency applications, while still providing high performance.

    摘要翻译: 具有拓扑结构的便宜,高性能,完全可集成的多标准收发器,包括:有源混频器,其次是高通滤波器和无源混频器。 输入信号使用一对互补的非周期性混合信号进行调制或解调。 使用非周期混合信号可以建立一个完全集成的收发器。 有源混频器的实施例包括具有电可调节性能并允许多个RF信号输入的那些。 这允许在多频,多频应用中使用拓扑,同时仍然提供高性能。

    Integrated circuit adjustable RF mixer
    3.
    发明授权
    Integrated circuit adjustable RF mixer 有权
    集成电路可调RF混频器

    公开(公告)号:US06590438B1

    公开(公告)日:2003-07-08

    申请号:US10096118

    申请日:2002-03-08

    IPC分类号: G11B700

    摘要: The invention describes improvements to a balanced active demodulator subsystem implemented in Radio Frequency integrated circuit technology that simplify the configuration and set-up of a balanced demodulator section and reduce the labor and time required during manufacture to adjust the demodulation characteristics for optimum performance. The subsystem allows for the selection of various combinations of components during use, during configuration and set-up, or during both phases, and comprises a mixer, a plurality of parallel RF balanced amplifier input stages operationally connected to the mixer, a first set of switches arranged to permit the independent selection and making operable one of the RF balanced amplifier stages, a number of pairs of current sources arranged to provide bias currents for the RF balanced amplifier input stages to reduce the current required to be passed through the balanced demodulator section; and a second set of switches arranged to permit the independent selection and making operable one of said pairs of current sources. The invention provides a balanced demodulator subsystem suitable for use in products in which cost-effectiveness is a critical factor, such as those used in personal communications.

    摘要翻译: 本发明描述了在射频集成电路技术中实现的平衡有源解调器子系统的改进,其简化了平衡解调器部分的配置和设置,并减少了制造期间所需的劳动力和时间,以调整解调特性以获得最佳性能。 子系统允许在使用期间,在配置和建立期间或在两个阶段期间选​​择组件的各种组合,并且包括混合器,可操作地连接到混频器的多个并联RF平衡放大器输入级,第一组 开关,其被布置成允许独立选择并使得可操作的RF平衡放大器级中的一个,布置成为RF平衡放大器输入级提供偏置电流的多对电流源,以减少要通过平衡解调器部分的电流 ; 以及第二组开关,其布置成允许独立选择并使得可操作的所述一对电流源中的一个。 本发明提供了一种适用于成本效益是关键因素的产品中的平衡解调器子系统,例如用于个人通信中的那些。

    Microprocessor programmable clock calibration system and method
    4.
    发明授权
    Microprocessor programmable clock calibration system and method 有权
    微处理器可编程时钟校准系统及方法

    公开(公告)号:US07890787B2

    公开(公告)日:2011-02-15

    申请号:US11453684

    申请日:2006-06-15

    IPC分类号: G06F1/12

    摘要: A microprocessor programmable clock calibration device compares, in response to a calibration command from a programmable processor, turns on a normally off reference oscillator clock, compares the frequency of the reference oscillator clock with the frequency of a calibratable oscillator clock, turns off the reference oscillator clock and adjusts, in response to a difference in those frequencies, the frequency of the calibratable oscillator clock towards that of the reference oscillator clock.

    摘要翻译: 微处理器可编程时钟校准装置响应来自可编程处理器的校准命令来比较正常关断参考振荡器时钟,将参考振荡器时钟的频率与可校准振荡器时钟的频率进行比较,将参考振荡器 响应于这些频率的差异,可调整校准振荡器时钟频率与参考振荡器时钟的频率。

    Microprocessor programmable clock calibration system and method
    5.
    发明申请
    Microprocessor programmable clock calibration system and method 有权
    微处理器可编程时钟校准系统及方法

    公开(公告)号:US20070019770A1

    公开(公告)日:2007-01-25

    申请号:US11453684

    申请日:2006-06-15

    IPC分类号: H04L7/02

    摘要: A microprocessor programmable clock calibration device compares, in response to a calibration command from a programmable processor, turns on a normally off reference oscillator clock, compares the frequency of the reference oscillator clock with the frequency of a calibratable oscillator clock, turns off the reference oscillator clock and adjusts, in response to a difference in those frequencies, the frequency of the calibratable oscillator clock towards that of the reference oscillator clock.

    摘要翻译: 微处理器可编程时钟校准装置响应来自可编程处理器的校准命令来比较正常关断参考振荡器时钟,将参考振荡器时钟的频率与可校准振荡器时钟的频率进行比较,将参考振荡器 响应于这些频率的差异,可调整校准振荡器时钟频率与参考振荡器时钟的频率。