摘要:
A radio communication apparatus having a radio modem for processing a signal in a radio frequency band, a signal processor for processing a base band of a transmission or reception signal, and a CPU for processing a protocol. The signal processor includes signal processing blocks implemented by programmable software. Each of the signal processing blocks processes a signal of reception signal data input from the radio modem or from a preceding stage of one of the signal processing blocks or a signal of transmission signal data input from the CPU or from the preceding stage of signal processing block on the basis of a control signal input together with the transmission signal data or the reception signal data. The control signal can include information required by all the signal processing blocks in a common format.
摘要:
To simplify the configuration of functional modules in a software-defined radio apparatus, and facilitate the development of software. The functional modules have input and output terminals of a common configuration. Distributed timing control is performed so that the functional modules operate in their respective timings, and the functional modules have common input/output signals.
摘要:
To simplify the configuration of functional modules in a software-defined radio apparatus, and facilitate the development of software. The functional modules have input and output terminals of a common configuration. Distributed timing control is performed so that the functional modules operate in their respective timings, and the functional modules have common input/output signals.
摘要:
A radio communication apparatus having a radio modem for processing a signal in a radio frequency band, a signal processor for processing a base band of a transmission or reception signal, and a CPU for processing a protocol. The signal processor includes signal processing blocks implemented by programmable software. Each of the signal processing blocks processes a signal of reception signal data input from the radio modem or from a preceding stage of one of the signal processing blocks or a signal of transmission signal data input from the CPU or from the preceding stage of signal processing block on the basis of a control signal input together with the transmission signal data or the reception signal data. The control signal can include information required by all the signal processing blocks in a common format.
摘要:
Disclosed is the hardware construction of a radio communication apparatus that can meet advanced radio communications. A control bus for transferring control signals between a main processor and components is separated from a data bus for transferring transmission/receive signals between processor units including sub-processors and an external interface. The sub-processors constitute the processor units, and a software defined radio of the present invention may include plural processor units. The processor units are connected by a dedicated interunit interface. The processor units may include multiple sub-processors, which are connected serially through an interprocessor interface.
摘要:
An AD/DA converter is equipped to the wireless communication device main unit side, and a transmission and reception base band filter is equipped to the wireless module side. Due to this arrangement, miniaturization and setting of the cost at a low level of the wireless module replaced for every communication system and the wireless communication device as a total become possible.
摘要:
Disclosed is the hardware construction of a radio communication apparatus that can meet advanced radio communications. A control bus for transferring control signals between a main processor and components is separated from a data bus for transferring transmission/receive signals between processor units including sub-processors and an external interface. The sub-processors constitute the processor units, and a software defined radio of the present invention may include plural processor units. The processor units are connected by a dedicated interunit interface. The processor units may include multiple sub-processors, which are connected serially through an interprocessor interface.
摘要:
The invention provides a technique that saves rate conversion accompanying complicated calculations and shares an analog filter for anti-aliasing in a sampling device. The sampling device employs an anti-alias filter having a fixed cutoff frequency, an A/D converter and a D/A converter each having a clock signal input, which are capable of varying a sampling frequency, and a PLL circuit capable of varying the frequency of a clock signal; and it sets the sampling frequency not lower than an integral multiple of a signal bandwidth and double the cutoff frequency for sampling.
摘要:
The invention provides a technique that saves rate conversion accompanying complicated calculations and shares an analog filter for anti-aliasing in a sampling device. The sampling device employs an anti-alias filter having a fixed cutoff frequency, an A/D converter and a D/A converter each having a clock signal input, which are capable of varying a sampling frequency, and a PLL circuit capable of varying the frequency of a clock signal; and it sets the sampling frequency not lower than an integral multiple of a signal bandwidth and double the cutoff frequency for sampling.
摘要:
Resources are assigned in units of resource blocks each composed of one or more subcarriers, inter-cell interference adjustment control information is notified to each other among base stations, a transmit power limitation on each of the resource blocks in a cell is decided based on the inter-cell interference adjustment control information; and the decision of the transmit power limitation is changed sequentially beginning at a resource block having a transmit power limitation different from the transmit power limitation on an adjacent resource block.