Reference clock recovery circuit and data receiving apparatus
    1.
    发明申请
    Reference clock recovery circuit and data receiving apparatus 审中-公开
    参考时钟恢复电路和数据接收装置

    公开(公告)号:US20070091935A1

    公开(公告)日:2007-04-26

    申请号:US11580856

    申请日:2006-10-16

    IPC分类号: H04J3/06

    摘要: An audio recovery circuit is supplied with a video clock VCK that synchronizes with a video clock of a sending side recovered according to a frame synchronizing signal generated based on an incoming stream. The audio recovery circuit includes a PLL circuit for multiplying and dividing VCK to generate an audio master clock MCK, a counting circuit for counting the number of MCKs in one frame, and a cycle adjusting circuit for generating an audio bit clock BCK from a specified number of MCKs. The cycle adjusting circuit adjusts a cycle of BCK in a unit of MCK so that the number of clocks corresponds with the number of samples, according to the number of audio samples to be sent and the number of current MCK.

    摘要翻译: 提供一个音频恢复电路,该视频时钟VCK与根据基于输入流产生的帧同步信号恢复的发送侧的视频时钟同步。 音频恢复电路包括用于乘法和分频VCK以产生音频主时钟MCK的PLL电路,用于对一帧中的MCK的数量进行计数的计数电路,以及用于从指定数字产生音频位时钟BCK的周期调整电路 的MCKs。 循环调整电路以MCK为单位调整BCK的周期,使得根据要发送的音频样本的数量和当前MCK的数目,时钟数与采样数相对应。