5V-tolerant receiver for low voltage CMOS technologies
    1.
    发明授权
    5V-tolerant receiver for low voltage CMOS technologies 失效
    用于低电压CMOS技术的5V耐受接收器

    公开(公告)号:US06441670B1

    公开(公告)日:2002-08-27

    申请号:US09930413

    申请日:2001-08-15

    IPC分类号: H03K508

    CPC分类号: H03K5/08 H03K19/00315

    摘要: Receiver circuit providing interface between a legacy system sourcing logic signals including high logic level signals at first voltage levels to semiconductor IC devices operating at second voltage levels, wherein the first voltage levels are greater than the second voltage levels. The receiver circuit comprises: a pass gate device receiving the input voltages including high level logic signals at first logic levels and translating the high logic level signals to an intermediate voltage level for output at a first circuit node, the intermediate voltage level being less than the first voltage level; a first inverter device for receiving the translated voltages at the intermediate voltage levels and inverting the voltages for output at a second circuit node, whereby high input logic level voltages are pulled down at the second node and low input logic level voltages are pulled up at the second node; a circuit element in series with the first inverter device for connecting the first inverter device to a voltage supply source that provides pulled up signals at the second voltage levels in response to low logic level input voltages; and, a circuit responsive to pulled down voltage at the second node for deactivating the first circuit element to thereby prevent leakage current to ground through the first inverter device. Stable switching of voltages is achieved at the second node in a manner that eliminates leakage current between the voltage supply source providing pulled up signals at the second voltage levels and the receiver input.

    摘要翻译: 接收器电路提供传统系统之间的接口,逻辑信号包括在第一电压电平处的高逻辑电平信号到在第二电压电平工作的半导体IC器件,其中第一电压电平大于第二电压电平。 接收器电路包括:通过栅极器件,其接收包括处于第一逻辑电平的高电平逻辑信号的输入电压,并将高逻辑电平信号转换成中间电压电平以在第一电路节点处输出,所述中间电压电平小于 第一电压电平; 第一逆变器装置,用于接收处于中间电压电平的转换电压并使第二电路节点处的输出电压反相,从而在第二节点向下拉高输入逻辑电平电压,并在第二节点处将低输入逻辑电平电压拉高 第二节点 与所述第一逆变器装置串联的电路元件,用于将所述第一逆变器装置连接到电压源,所述电压源响应于低逻辑电平输入电压而以所述第二电压电平提供上拉信号; 以及响应于第二节点处的下拉电压的电路,用于停用第一电路元件,从而防止通过第一逆变器装置接地的漏电流。 在第二节点处实现稳定的电压切换,以消除在第二电压电平提供上拉信号的电压源和接收器输入之间的泄漏电流。