公开(公告)号：US11522043B2

公开(公告)日：2022-12-06

申请号：US17085116

申请日：2020-10-30

Applicant: Texas Instruments Incorporated

Inventor： Scott William Jessen ,  Tae Seung Kim ,  Steven Lee Prins ,  Can Duan ,  Abbas Ali ,  Erich Wesley Kinder

IPC: H01L49/02 ,  H01L21/8234 ,  H01L27/12 ,  H01L27/01 ,  H01L21/3213 ,  H01L21/311

Abstract: A method of fabricating an integrated circuit (IC) includes forming a dielectric layer on a substrate having a plurality of the IC. A thin-film resistor (TFR) layer is deposited on the dielectric layer, and an underlayer (UL) including carbon is formed on the TFR layer. A hard mask layer including silicon is formed on the UL. Masked etching of the hard mask layer transfers a pattern of a photoresist layer onto the hard mask layer to form a hard mask layer pattern. Masked etching of the UL transfers the hard mask layer pattern onto the UL to form a UL pattern. Masked etching of the TFR layer transfers the UL pattern onto the TFR layer to form a TFR layer pattern including a matched pair of TFRs. The matched pair of TFRs are generally included in circuitry configured together for implementing at least one function.

公开(公告)号：US20210134939A1

公开(公告)日：2021-05-06

申请号：US17085116

申请日：2020-10-30

Applicant: Texas Instruments Incorporated

Inventor： Scott William Jessen ,  Tae Seung Kim ,  Steven Lee Prins ,  Can Duan ,  Abbas Ali ,  Erich Wesley Kinder

IPC: H01L49/02 ,  H01L21/8234 ,  H01L27/01 ,  H01L27/12

Abstract: A method of fabricating an integrated circuit (IC) includes forming a dielectric layer on a substrate having a plurality of the IC. A thin-film resistor (TFR) layer is deposited on the dielectric layer, and an underlayer (UL) including carbon is formed on the TFR layer. A hard mask layer including silicon is formed on the UL. Masked etching of the hard mask layer transfers a pattern of a photoresist layer onto the hard mask layer to form a hard mask layer pattern. Masked etching of the UL transfers the hard mask layer pattern onto the UL to form a UL pattern. Masked etching of the TFR layer transfers the UL pattern onto the TFR layer to form a TFR layer pattern including a matched pair of TFRs. The matched pair of TFRs are generally included in circuitry configured together for implementing at least one function.