公开(公告)号：US10763251B2

公开(公告)日：2020-09-01

申请号：US15715988

申请日：2017-09-26

Applicant: Texas Instruments Incorporated

Inventor： Krishna Praveen Mysore Rajagopal ,  James P Di Sarro ,  Mariano Dissegna ,  Lihui Wang ,  Ann Margaret Concannon

IPC: H02H9/04 ,  H01L27/02 ,  H02H3/20 ,  H01L29/808

Abstract: A semiconductor device has a protected line connected to a ground line by a triggered clamp. A variable shunt, which includes a depletion mode JFET, is connected between the protected line and the ground line, in parallel with the triggered clamp. The depletion mode JFET is formed in a substrate of the semiconductor device. The channel of the depletion mode JFET provides a resistive path for the variable shunt when the semiconductor device is unpowered, to dissipate charge from the powered line after an ESD event. When the semiconductor device is operated, that is, powered up, the gate of the depletion mode JFET may be biased to turn off the channel, and so reduce impairment of operation of the semiconductor device.

公开(公告)号：US20190096874A1

公开(公告)日：2019-03-28

申请号：US15715988

申请日：2017-09-26

Applicant: Texas Instruments Incorporated

Inventor： Krishna Praveen Mysore Rajagopal ,  James P. Di Sarro ,  Mariano Dissegna ,  Lihui Wang ,  Ann Margaret Concannon

IPC: H01L27/02 ,  H02H3/20

Abstract: A semiconductor device has a protected line connected to a ground line by a triggered clamp. A variable shunt, which includes a depletion mode JFET, is connected between the protected line and the ground line, in parallel with the triggered clamp. The depletion mode JFET is formed in a substrate of the semiconductor device. The channel of the depletion mode JFET provides a resistive path for the variable shunt when the semiconductor device is unpowered, to dissipate charge from the powered line after an ESD event. When the semiconductor device is operated, that is, powered up, the gate of the depletion mode JFET may be biased to turn off the channel, and so reduce impairment of operation of the semiconductor device.