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公开(公告)号:US12150298B2
公开(公告)日:2024-11-19
申请号:US17515147
申请日:2021-10-29
Applicant: Texas Instruments Incorporated
Inventor: Anand Seshadri , Kemal Tamer San , Sunil Kumar Dusa , Michael Ball , Akram A. Salman
IPC: H01L21/00 , G11C17/16 , G11C17/18 , H01L23/525 , H10B20/20
Abstract: An integrated circuit (IC), comprising a fuse structure (eFuse) formed in a resistive layer over a semiconductor substrate, the eFuse subject to a change in resistance through the controlled application of a programming current from a programming voltage source connected to a first terminal of the eFuse; a blow transistor formed on or over the substrate and having a control terminal configured to cause the programming current to flow through the eFuse in response to a programming signal; an intermediate transistor formed on or over the substrate and electrically coupled in series between a second terminal of the eFuse and the blow transistor; and, control circuitry formed on or over the substrate and electrically coupled to a node between the second terminal of the eFuse and the intermediate transistor, the control circuitry configured to reduce the flow of programming current through the eFuse in the event that a voltage detected at the node reaches a threshold level.
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公开(公告)号:US20230138308A1
公开(公告)日:2023-05-04
申请号:US17515147
申请日:2021-10-29
Applicant: Texas Instruments Incorporated
Inventor: Anand Seshadri , Kemal Tamer San , Sunil Kumar Dusa , Michael Ball , Akram A. Salman
IPC: H01L27/112 , H01L23/525 , G11C17/18 , G11C17/16
Abstract: An integrated circuit (IC), comprising a fuse structure (eFuse) formed in a resistive layer over a semiconductor substrate, the eFuse subject to a change in resistance through the controlled application of a programming current from a programming voltage source connected to a first terminal of the eFuse; a blow transistor formed on or over the substrate and having a control terminal configured to cause the programming current to flow through the eFuse in response to a programming signal; an intermediate transistor formed on or over the substrate and electrically coupled in series between a second terminal of the eFuse and the blow transistor; and, control circuitry formed on or over the substrate and electrically coupled to a node between the second terminal of the eFuse and the intermediate transistor, the control circuitry configured to reduce the flow of programming current through the eFuse in the event that a voltage detected at the node reaches a threshold level.
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