公开(公告)号：US20240178807A1

公开(公告)日：2024-05-30

申请号：US18070215

申请日：2022-11-28

Applicant: Texas Instruments Incorporated

Inventor： Ankit Khanna ,  Dimitar Trifonov ,  Partha S. Basu ,  Chase Puglisi

IPC: H03F3/45 ,  H03F1/08

CPC classification number: H03F3/45475 ,  H03F1/086 ,  H03F2200/261 ,  H03F2200/462 ,  H03F2203/45134

Abstract: An example apparatus includes: a transconductance stage including: a fully differential amplifier configured to generate a differential current based on a voltage input; and a transistor configured to be controlled by an output of the fully differential amplifier and source current from an input of the fully differential amplifier; and a transimpedance stage coupled to the transconductance stage, the transimpedance stage including: resistor circuitry configured to convert the differential current into a differential voltage using a first resistance, a second resistance, and a third resistance; and a differential amplifier configured to convert the differential voltage to a single-ended voltage, which represents the voltage input.

公开(公告)号：US20240146265A1

公开(公告)日：2024-05-02

申请号：US17977840

申请日：2022-10-31

Applicant: Texas Instruments Incorporated

Inventor： Ankit Khanna ,  Dimitar Trifonov ,  Partha S. Basu ,  Sudheer Gangula

IPC: H03F3/45

CPC classification number: H03F3/45475 ,  H03F2203/45594

Abstract: An example apparatus includes: a differential amplifier including: an inverting input coupled to a first input via a first resistor; a non-inverting input coupled to a second input via a second resistor; a first supply input coupled to the first input via a third resistor, and the first supply input coupled to the second input via a fourth resistor; a second supply input coupled to a current source; a non-inverting output; and an inverting output; a first transistor including a first control terminal and a first current terminal, the first control terminal coupled to the non-inverting output and the first current terminal coupled to the inverting input; and a second transistor including a second control terminal and a second current terminal, the second control terminal coupled to the inverting output and the second current terminal coupled to the non-inverting input.