公开(公告)号：US08963607B1

公开(公告)日：2015-02-24

申请号：US14468009

申请日：2014-08-25

Applicant: Texas Instruments Incorporated

Inventor： Sandeep Kesrimal Oswal ,  Eeshan Miglani ,  H. Mohammed Shuaeb Fazeel ,  Pradeep Nair ,  Anand Hariraj Udupa

IPC: H03L5/00 ,  H03K5/003

CPC classification number: H03K5/003

Abstract: DC offset correction is provided with low frequency support. A first input terminal for receiving an input signal is selectively coupled to a resistance and a capacitor that are series coupled between the first input terminal and a corresponding output terminal. In a calibration phase, the series resistance is coupled between the input terminal and the capacitor and an average voltage level of the input is stored on capacitor. In a signal processing phase, the charged capacitor is coupled in series between the input terminal and the output terminal while the resistance is bypassed. The output signal obtained contains the high and low frequency components of the input signal, while the DC offset in the input signal is removed from the output signal. A differential circuit and methods are disclosed. Additional embodiments are disclosed.

Abstract translation: DC偏移校正提供低频支持。 用于接收输入信号的第一输入端选择性地耦合到串联耦合在第一输入端和相应输出端之间的电阻和电容。 在校准阶段，串联电阻耦合在输入端和电容之间，输入的平均电压电平存储在电容上。 在信号处理阶段，当电阻被旁路时，充电的电容器串联在输入端子和输出端子之间。 获得的输出信号包含输入信号的高频和低频分量，输入信号中的直流偏移从输出信号中去除。 公开了一种差分电路和方法。 公开了另外的实施例。

公开(公告)号：US20150054560A1

公开(公告)日：2015-02-26

申请号：US14468009

申请日：2014-08-25

Applicant: Texas Instruments Incorporated

Inventor： Sandeep Kesrimal Oswal ,  Eeshan Miglani ,  H. Mohammed Shuaeb Fazeel ,  Pradeep Nair ,  Anand Hariraj Udupa

IPC: H03K5/003

CPC classification number: H03K5/003

Abstract: DC offset correction is provided with low frequency support. A first input terminal for receiving an input signal is selectively coupled to a resistance and a capacitor that are series coupled between the first input terminal and a corresponding output terminal. In a calibration phase, the series resistance is coupled between the input terminal and the capacitor and an average voltage level of the input is stored on capacitor. In a signal processing phase, the charged capacitor is coupled in series between the input terminal and the output terminal while the resistance is bypassed. The output signal obtained contains the high and low frequency components of the input signal, while the DC offset in the input signal is removed from the output signal. A differential circuit and methods are disclosed. Additional embodiments are disclosed.

Abstract translation: DC偏移校正提供低频支持。 用于接收输入信号的第一输入端选择性地耦合到串联耦合在第一输入端和相应输出端之间的电阻和电容。 在校准阶段，串联电阻耦合在输入端和电容之间，输入的平均电压电平存储在电容上。 在信号处理阶段，当电阻被旁路时，充电的电容器串联在输入端子和输出端子之间。 获得的输出信号包含输入信号的高频和低频分量，输入信号中的直流偏移从输出信号中去除。 公开了一种差分电路和方法。 公开了另外的实施例。