公开(公告)号：US11777513B2

公开(公告)日：2023-10-03

申请号：US17538746

申请日：2021-11-30

Applicant: Texas Instruments Incorporated

Inventor： Karthikeyan Gunasekaran ,  Snehasish Roychowdhury ,  Rakesh Manjunath ,  Aswath V S ,  Sthanunathan Ramakrishnan ,  Sarma Sudareswara Gunturi ,  Rahul Sharma ,  Jagannathan Venkataraman ,  Nagarajan Viswanathan

IPC: H03M1/10 ,  H03M1/66 ,  H03M1/06 ,  H03M1/08

CPC classification number: H03M1/1033 ,  H03M1/0631 ,  H03M1/0863 ,  H03M1/662

Abstract: A spur correction system for a transmit chain having an interleaving multiplexer. In some embodiments, the spur correction system includes a spur sense chain, a correction controller, and a Q path corrector. The interleaving multiplexer combines signals from multiple bands in response to a clock signal. The spur sense chain estimates an error that is in phase with the clock signal (an I-phase error) and an error that is a derivative of the clock signal (a Q-phase error). The correction controller compensates for the estimated I-phase error by injecting an I-phase correction signal into the transmit chain. The Q path corrector compensates for the estimated Q-phase error by selectively connecting one or more capacitors within the interleaving multiplexer.