-
Patent Agency Ranking
公开(公告)号：US20160004266A1
公开(公告)日：2016-01-07
申请号：US14323870
申请日：2014-07-03
Applicant: Texas Instruments Incorporated
Inventor： Steven Mark Mercer
IPC: G05F1/575
CPC classification number: G05F1/575 , H02M3/1584 , H02M2003/1586
Abstract: In described examples, a phase interleaver obtains (i) a first signal indicating a variance between a reference voltage and a regulated output voltage and (ii) a second signal indicating a voltage across an energy storage device. A voltage regulator includes multiple phase blocks collectively configured to generate the regulated output voltage. In a repeating cycle, (i) the voltage across the energy storage device is increased while the second signal is less than the first signal and (ii) in response to a determination that the second signal is greater than the first signal, the energy storage device is substantially discharged, multiple stages of a clock divider are transitioned in the phase interleaver, and a set of control signals is output from the clock divider. The control signals have a common switching frequency and a common switching period. The control signals control the phase blocks active in generating the output voltage.
-
公开(公告)号：US09726697B2
公开(公告)日：2017-08-08
申请号：US14588394
申请日：2014-12-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Dina Reda El-Damak , Jeffrey Morroni , Steven Mark Mercer
CPC classification number: G01R19/10 , G01R1/203 , G01R19/0092 , G01R31/40
Abstract: A voltage proportional to a sum of currents flowing though first and second coupled inductors is developed across a first capacitor common to first and second series RC networks if the RC networks are time constant-matched to the inductors. The first and second inductors are coupled between a first and second switched drive phase input terminal, respectively, and an apparatus output terminal. The first and second RC networks are coupled in parallel with the first and second inductor, respectively. Inverting and non-inverting inputs of an amplifier are coupled to junctions of third and fourth time constant-matched series RC networks coupled in parallel with the first and second inductors, respectively. The amplifier subtracts voltages sensed at the junctions to generate a difference signal proportional to a magnitude difference of the currents flowing through the inductors.
-
公开(公告)号：US09383761B2
公开(公告)日：2016-07-05
申请号：US14323870
申请日：2014-07-03
Applicant: Texas Instruments Incorporated
Inventor： Steven Mark Mercer
CPC classification number: G05F1/575 , H02M3/1584 , H02M2003/1586
Abstract: In described examples, a phase interleaver obtains (i) a first signal indicating a variance between a reference voltage and a regulated output voltage and (ii) a second signal indicating a voltage across an energy storage device. A voltage regulator includes multiple phase blocks collectively configured to generate the regulated output voltage. In a repeating cycle, (i) the voltage across the energy storage device is increased while the second signal is less than the first signal and (ii) in response to a determination that the second signal is greater than the first signal, the energy storage device is substantially discharged, multiple stages of a clock divider are transitioned in the phase interleaver, and a set of control signals is output from the clock divider. The control signals have a common switching frequency and a common switching period. The control signals control the phase blocks active in generating the output voltage.
Abstract translation: 在所描述的示例中，相位交织器获得（i）指示参考电压和调节输出电压之间的差异的第一信号和（ii）指示能量存储装置两端的电压的第二信号。 电压调节器包括共同配置为产生调节输出电压的多个相位块。 在重复循环中，（i）能量存储装置两端的电压增加，而第二信号小于第一信号，以及（ii）响应于第二信号大于第一信号的确定，能量存储 器件基本放电，在相位交织器中转换多级时钟分频器，并且从时钟分频器输出一组控制信号。 控制信号具有公共的开关频率和公共的开关周期。 控制信号控制在产生输出电压时有效的相位块。
-
公开(公告)号：US20160187386A1
公开(公告)日：2016-06-30
申请号：US14588394
申请日：2014-12-31
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Dina Reda El-Damak , Jeffrey Morroni , Steven Mark Mercer
CPC classification number: G01R19/10 , G01R1/203 , G01R19/0092 , G01R31/40
Abstract: A voltage proportional to a sum of currents flowing though first and second coupled inductors is developed across a first capacitor common to first and second series RC networks if the RC networks are time constant-matched to the inductors. The first and second inductors are coupled between a first and second switched drive phase input terminal, respectively, and an apparatus output terminal. The first and second RC networks are coupled in parallel with the first and second inductor, respectively. Inverting and non-inverting inputs of an amplifier are coupled to junctions of third and fourth time constant-matched series RC networks coupled in parallel with the first and second inductors, respectively. The amplifier subtracts voltages sensed at the junctions to generate a difference signal proportional to a magnitude difference of the currents flowing through the inductors.
Abstract translation: 如果RC网络与电感器时间恒定匹配，则与通过第一和第二耦合电感器流动的电流之和成比例的电压跨越第一和第二串联RC网络公共的第一电容器被开发。 第一和第二电感器分别耦合在第一和第二开关驱动相位输入端子和装置输出端子之间。 第一和第二RC网络分别与第一和第二电感器并联耦合。 放大器的反相和非反相输入分别耦合到与第一和第二电感器并联耦合的第三和第四时间恒定匹配串联RC网络的结。 放大器减去在结处感测的电压，以产生与流过电感器的电流的幅度差成比例的差分信号。
-
公开(公告)号：US20160124446A9
公开(公告)日：2016-05-05
申请号：US14323870
申请日：2014-07-03
Applicant: Texas Instruments Incorporated
Inventor： Steven Mark Mercer
IPC: G05F1/575
CPC classification number: G05F1/575 , H02M3/1584 , H02M2003/1586
Abstract: In described examples, a phase interleaver obtains (i) a first signal indicating a variance between a reference voltage and a regulated output voltage and (ii) a second signal indicating a voltage across an energy storage device. A voltage regulator includes multiple phase blocks collectively configured to generate the regulated output voltage. In a repeating cycle, (i) the voltage across the energy storage device is increased while the second signal is less than the first signal and (ii) in response to a determination that the second signal is greater than the first signal, the energy storage device is substantially discharged, multiple stages of a clock divider are transitioned in the phase interleaver, and a set of control signals is output from the clock divider. The control signals have a common switching frequency and a common switching period. The control signals control the phase blocks active in generating the output voltage.
Abstract translation: 在所描述的示例中，相位交织器获得（i）指示参考电压和调节输出电压之间的差异的第一信号和（ii）指示能量存储装置两端的电压的第二信号。 电压调节器包括共同配置为产生调节输出电压的多个相位块。 在重复循环中，（i）能量存储装置两端的电压增加，而第二信号小于第一信号，以及（ii）响应于第二信号大于第一信号的确定，能量存储 器件基本放电，在相位交织器中转换多级时钟分频器，并且从时钟分频器输出一组控制信号。 控制信号具有公共的开关频率和公共的开关周期。 控制信号控制在产生输出电压时有效的相位块。
-
-
-
-
Search Results
5
records
(took 0.017 seconds)
