公开(公告)号：US20190007046A1

公开(公告)日：2019-01-03

申请号：US15635924

申请日：2017-06-28

Applicant: Texas Instruments Incorporation

Inventor： Christopher Michael Graves

IPC: H03K19/0185 ,  H03K19/00 ,  H03K17/16

Abstract: A gate control circuit for a tristate output buffer operating in a first voltage domain includes a pull-up circuit coupled between an upper rail and a first gate control signal, a pull-down circuit coupled between a lower rail and a second gate control signal, and a gate isolation switch coupled between the first gate control signal and the second gate control signal. The gate isolation switch includes a first PMOS transistor coupled in parallel with a first NMOS transistor. The first NMOS transistor is controlled by a first enable signal and the first PMOS transistor is controlled by a second enable signal.