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公开(公告)号：US08954790B2
公开(公告)日：2015-02-10
申请号：US12984500
申请日：2011-01-04
CPC分类号： G06F11/1666 , G06F11/1658 , G06F11/20 , G06F12/0813 , G06F12/0846 , G06F12/0864
摘要： A semiconductor chip is described having different instances of cache agent logic circuitry for respective cache slices of a distributed cache. The semiconductor chip further includes hash engine logic circuitry comprising: hash logic circuitry to determine, based on an address, that a particular one of the cache slices is to receive a request having the address, and, a first input to receive notice of a failure event for the particular cache slice. The semiconductor chip also includes first circuitry to assign the address to another cache slice of the cache slices in response to the notice.
摘要翻译： 描述了具有用于分布式高速缓存的各个缓存片段的高速缓存代理逻辑电路的不同实例的半导体芯片。 半导体芯片还包括散列引擎逻辑电路，包括：散列逻辑电路，用于基于地址确定特定的一个高速缓存片段将接收具有该地址的请求，以及第一输入以接收故障通知 特定缓存片段的事件。 半导体芯片还包括响应于通知将地址分配给高速缓存片的另一高速缓存片的第一电路。
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公开(公告)号：US20120005524A1
公开(公告)日：2012-01-05
申请号：US12984500
申请日：2011-01-04
IPC分类号： G06F11/20
CPC分类号： G06F11/1666 , G06F11/1658 , G06F11/20 , G06F12/0813 , G06F12/0846 , G06F12/0864
摘要： A semiconductor chip is described having different instances of cache agent logic circuitry for respective cache slices of a distributed cache. The semiconductor chip further includes hash engine logic circuitry comprising: hash logic circuitry to determine, based on an address, that a particular one of the cache slices is to receive a request having the address, and, a first input to receive notice of a failure event for the particular cache slice. The semiconductor chip also includes first circuitry to assign the address to another cache slice of the cache slices in response to the notice.
摘要翻译： 描述了具有用于分布式高速缓存的各个缓存片段的高速缓存代理逻辑电路的不同实例的半导体芯片。 半导体芯片还包括散列引擎逻辑电路，包括：散列逻辑电路，用于基于地址确定特定的一个高速缓存片段将接收具有该地址的请求，以及第一输入以接收故障通知 特定缓存片段的事件。 半导体芯片还包括响应于通知将地址分配给高速缓存片的另一高速缓存片的第一电路。
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