Opportunistic bus access latency
    1.
    发明授权
    Opportunistic bus access latency 失效
    机会总线访问延迟

    公开(公告)号:US08212588B2

    公开(公告)日:2012-07-03

    申请号:US12729455

    申请日:2010-03-23

    IPC分类号: H03K19/094

    CPC分类号: G06F13/4243

    摘要: A bus system that includes a plurality of signal driving devices coupled to a common signal bus, a bus controlled circuit coupled to the common signal bus, and a compare circuit. The plurality of signal driving devices include a first signal driving device and a second signal driving device. The bus controller includes delay compensation circuitry with a configurable delay for each of the signal driving devices. The delay compensation circuitry has a current delay chain configuration associated with the first signal driving device. The compare circuit is configured to compare a first configurable delay associated with a first signal driving device to a second configurable delay associated with a second signal driving device of the plurality of signal driving devices, and for generating an output responsive to the comparing that indicates if the current delay chain configuration can be used by the second signal driving device.

    摘要翻译: 一种总线系统,其包括耦合到公共信号总线的多个信号驱动装置,耦合到公共信号总线的总线控制电路和比较电路。 多个信号驱动装置包括第一信号驱动装置和第二信号驱动装置。 总线控制器包括具有用于每个信号驱动装置的可配置延迟的延迟补偿电路。 延迟补偿电路具有与第一信号驱动装置相关联的电流延迟链配置。 比较电路被配置为将与第一信号驱动装置相关联的第一可配置延迟与与多个信号驱动装置中的第二信号驱动装置相关联的第二可配置延迟进行比较,并且用于响应于比较来产生响应于指示是否 当前延迟链配置可以由第二信号驱动装置使用。

    OPPORTUNISTIC BUS ACCESS LATENCY
    2.
    发明申请
    OPPORTUNISTIC BUS ACCESS LATENCY 失效
    机场总线访问延迟

    公开(公告)号:US20110234259A1

    公开(公告)日:2011-09-29

    申请号:US12729455

    申请日:2010-03-23

    IPC分类号: H03K19/0175

    CPC分类号: G06F13/4243

    摘要: A bus system that includes a plurality of signal driving devices coupled to a common signal bus, a bus controlled circuit coupled to the common signal bus, and a compare circuit. The plurality of signal driving devices include a first signal driving device and a second signal driving device. The bus controller includes delay compensation circuitry with a configurable delay for each of the signal driving devices. The delay compensation circuitry has a current delay chain configuration associated with the first signal driving device. The compare circuit is configured to compare a first configurable delay associated with a first signal driving device to a second configurable delay associated with a second signal driving device of the plurality of signal driving devices, and for generating an output responsive to the comparing that indicates if the current delay chain configuration can be used by the second signal driving device.

    摘要翻译: 一种总线系统,其包括耦合到公共信号总线的多个信号驱动装置,耦合到公共信号总线的总线控制电路和比较电路。 多个信号驱动装置包括第一信号驱动装置和第二信号驱动装置。 总线控制器包括具有用于每个信号驱动装置的可配置延迟的延迟补偿电路。 延迟补偿电路具有与第一信号驱动装置相关联的电流延迟链配置。 比较电路被配置为将与第一信号驱动装置相关联的第一可配置延迟与与多个信号驱动装置中的第二信号驱动装置相关联的第二可配置延迟进行比较,并且用于响应于比较来产生响应于指示是否 当前延迟链配置可以由第二信号驱动装置使用。