公开(公告)号：US06601229B1

公开(公告)日：2003-07-29

申请号：US09521990

申请日：2000-03-09

申请人： Theron Paul Niederer ,  Raj Kumar Singh ,  Michael Raymond Trombley

发明人： Theron Paul Niederer ,  Raj Kumar Singh ,  Michael Raymond Trombley

IPC分类号： G06F1750

CPC分类号： G01R31/318357 ,  G01R31/318364 ,  G06F17/5022

摘要： A system, method and computer program features of the present invention, relate to verification or simulation of a design using a behavioral model structure for use in a Client/Server configuration. A physical part presents the external interface, and a functional procedural part which is comprised of at least one VHDL process. A testcase is a set of procedure calls written in VHDL. The present invention describes the architecture and implementation of a client/server behavioral model and procedural approach for testcase development which results in significant gain in productivity, quality of logic verification, and portability.

摘要翻译： 本发明的系统，方法和计算机程序特征涉及使用用于客户端/服务器配置的行为模型结构的设计的验证或模拟。 物理部分呈现外部接口，以及由至少一个VHDL进程组成的功能性程序部分。 测试用例是用VHDL编写的一组过程调用。 本发明描述了用于测试用例开发的客户机/服务器行为模型和程序方法的架构和实现，其导致生产率的显着增加，逻辑验证的质量和可移植性。

公开(公告)号：US08768651B2

公开(公告)日：2014-07-01

申请号：US12919229

申请日：2009-11-09

申请人： Srinivasan Bhaskaran ,  Raj Kumar Singh ,  Vishal Narayan ,  Ramakrishna Katakam ,  Sumeet Singh Manglotra ,  Aloke Roy ,  Clement Monneret

发明人： Srinivasan Bhaskaran ,  Raj Kumar Singh ,  Vishal Narayan ,  Ramakrishna Katakam ,  Sumeet Singh Manglotra ,  Aloke Roy ,  Clement Monneret

IPC分类号： G06F17/50

CPC分类号： G06F17/50 ,  G06Q10/06

摘要： A novel automatic standardization and verification process for system design requirements in a product development project is disclosed. In one embodiment, a method for automatic standardization and verification of system design requirements in a product development project using a standardization and verification tool embedded in a computer aided design (CAD) application includes obtaining a desired standardized requirement from a requirements database, retrieving compliance criteria from the standardized requirement, obtaining one or more components associated with the standardized requirement from one or more data sources, and obtaining relevant extracted and derived attributes from the one or more components, associated with the standardized requirement. The method further includes comparing the relevant extracted and derived attributes with the compliance criteria, determining whether the relevant extracted and derived attributes substantially meet the compliance criteria based on the outcome of the comparison, and generating a verification report based on the determination.

摘要翻译： 公开了一种产品开发项目中系统设计要求的新型自动标准化和验证流程。 在一个实施例中，使用嵌入在计算机辅助设计（CAD）应用中的标准化和验证工具在产品开发项目中自动标准化和验证系统设计要求的方法包括从需求数据库获得期望的标准化要求，检索合规标准 从标准化要求中，从一个或多个数据源获得与标准化要求相关联的一个或多个组件，以及从与标准化要求相关联的一个或多个组件获得相关的提取和导出的属性。 该方法还包括将相关的提取和导出的属性与合规标准进行比较，基于比较的结果确定相关的提取的和派生的属性是否基本上符合合规标准，以及基于该确定生成验证报告。

公开(公告)号：US07072816B1

公开(公告)日：2006-07-04

申请号：US09409940

申请日：1999-09-30

申请人： Bryan Keith Bullis ,  Raj Kumar Singh ,  Foster Beaver White

发明人： Bryan Keith Bullis ,  Raj Kumar Singh ,  Foster Beaver White

IPC分类号： G06F17/50

CPC分类号： G06F17/5022

摘要： A method and system for providing simulation of an integrated circuit during development of the integrated circuit is disclosed. The integrated circuit has an island that includes an interface. The method and system include a snooper, a checker and a generator. The snooper is coupled with an interface and is for obtaining an output provided by the island during simulation. The checker is coupled with an interface and is for checking the output to determine whether the output is a desired output. The generator is coupled with an interface and is for providing an input to the interface during simulation. The generator is coupled with a test case that directs the generator.

摘要翻译： 公开了一种用于在集成电路开发期间提供集成电路的仿真的方法和系统。 集成电路具有包括接口的岛。 该方法和系统包括一个窥探者，一个检查器和一个生成器。 监听器与接口耦合，用于在仿真期间获得由岛提供的输出。 检查器与接口耦合，用于检查输出以确定输出是否是期望的输出。 发生器与接口耦合，用于在仿真期间向接口提供输入。 发电机与引导发电机的测试箱相连。

公开(公告)号：US20110213757A1

公开(公告)日：2011-09-01

申请号：US12919229

申请日：2009-11-09

申请人： Srinivasan Bhaskaran ,  Raj Kumar Singh ,  Vishal Narayan ,  Ramakrishna Katakam ,  Sumeet Singh Manglotra ,  Aloke Roy ,  Clement Monneret

发明人： Srinivasan Bhaskaran ,  Raj Kumar Singh ,  Vishal Narayan ,  Ramakrishna Katakam ,  Sumeet Singh Manglotra ,  Aloke Roy ,  Clement Monneret

IPC分类号： G06F17/30

CPC分类号： G06F17/50 ,  G06Q10/06

摘要： A novel automatic standardization and verification process for system design requirements in a product development project is disclosed. In one embodiment, a method for automatic standardization and verification of system design requirements in a product development project using a standardization and verification tool embedded in a computer aided design (CAD) application includes obtaining a desired standardized requirement from a requirements database, retrieving compliance criteria from the standardized requirement, obtaining one or more components associated with the standardized requirement from one or more data sources, and obtaining relevant extracted and derived attributes from the one or more components, associated with the standardized requirement. The method further includes comparing the relevant extracted and derived attributes with the compliance criteria, determining whether the relevant extracted and derived attributes substantially meet the compliance criteria based on the outcome of the comparison, and generating a verification report based on the determination.

摘要翻译： 公开了一种产品开发项目中系统设计要求的新型自动标准化和验证流程。 在一个实施例中，使用嵌入在计算机辅助设计（CAD）应用中的标准化和验证工具在产品开发项目中自动标准化和验证系统设计要求的方法包括从需求数据库获得期望的标准化要求，检索合规标准 从标准化要求中，从一个或多个数据源获得与标准化要求相关联的一个或多个组件，以及从与标准化要求相关联的一个或多个组件获得相关的提取和导出的属性。 该方法还包括将相关的提取和导出的属性与合规标准进行比较，基于比较的结果确定相关的提取的和派生的属性是否基本上符合合规标准，以及基于该确定生成验证报告。

公开(公告)号：US06892172B1

公开(公告)日：2005-05-10

申请号：US09505748

申请日：2000-02-16

申请人： Raj Kumar Singh ,  Laura Ann Weaver

发明人： Raj Kumar Singh ,  Laura Ann Weaver

IPC分类号： G06F17/50 ,  H04J3/16 ,  H04L12/24

CPC分类号： H04L41/145 ,  G06F17/5022 ,  H04J3/1617

摘要： This system represents a customizable simulation model of an ATM/SONET Framer for System Level Verification and Performance-Characterization. An Asynchronous Transfer Mode (ATM) data processing ASIC interfaces with a Media Access Control (MAC) device that presents an electrical data path interface, called Universal Test & Operations PHY Interface for ATM (UTOPIA), using ATM protocol on the ASIC side and simplex optical interfaces using Synchronous Optical Network (SONET) protocol on the network side. Such a MAC device, commonly referred to as ATM/SONET Framer, provides one Receive and one Transmit interface to the network at various SONET line rates such as 155.52 Mbps (OC-3), 622.08 Mbps (OC-12), 2488.32 Mbps (OC-48), etc. The ATM and the SONET interfaces operate on different clock frequencies and thus represent two distinct clocking domains. The data interchange between the two clocking domains is achieved via FIFO buffer elements and associated control and status signals.

摘要翻译： 该系统代表用于系统级验证和性能表征的ATM / SONET成帧器的可定制仿真模型。 异步传输模式（ATM）数据处理ASIC与媒体访问控制（MAC）设备接口，该媒体访问控制（MAC）设备呈现电气数据路径接口，称为通用测试和操作PHY接口（UTOPIA），在ASIC侧使用ATM协议和单工 光接口在网络侧使用同步光网络（SONET）协议。 这种通常称为ATM / SONET成帧器的MAC设备以155.52Mbps（OC-3），622.08Mbps（OC-12），2488.32Mbps（OC-12），2488.32Mbps（各种SONET线速率）向网络提供一个接收和一个发送接口 OC-48）等。ATM和SONET接口在不同的时钟频率上工作，因此代表两个不同的时钟域。 两个时钟域之间的数据交换通过FIFO缓冲元件和相关的控制和状态信号来实现。