Methods and apparatus for saving conditions prior to a reset for post reset evaluation
    1.
    发明授权
    Methods and apparatus for saving conditions prior to a reset for post reset evaluation 有权
    用于在复位后复位评估时保存条件的方法和装置

    公开(公告)号:US08880860B2

    公开(公告)日:2014-11-04

    申请号:US13309623

    申请日:2011-12-02

    IPC分类号: G06F15/177

    CPC分类号: G06F11/1441

    摘要: A processor reset control circuit is configured to automatically capture a pre-reset value of processor information stored in one or more hardware registers, as part of a reset operation state machine and prior to changing the processor information to its architecturally required post reset value. Such pre-reset processor information includes, for example one or more pre-reset values of the processor program counter (PC) and one or more pre-reset values of an operating-state mode register, both of which may be captured in one or more pre-reset capture storage devices which are then made available for evaluation purposes. Such pre-reset capture storage devices store pre-reset information in response to the reset and maintain the stored pre-reset information until another reset occurs.

    摘要翻译: 处理器复位控制电路被配置为自动捕获存储在一个或多个硬件寄存器中的处理器信息的预复位值,作为复位操作状态机的一部分,并且在将处理器信息改变为其架构上所需的后置复位值之前。 这种预复位处理器信息包括例如处理器程序计数器(PC)的一个或多个预复位值和操作状态模式寄存器的一个或多个预复位值,它们都可以被捕获在一个或多个 更多的预复位捕获存储设备,然后可用于评估目的。 这种预复位捕获存储设备响应于重置来存储预复位信息,并保持所存储的预复位信息直到发生另一个复位。

    Methods and Apparatus for Saving Conditions Prior to a Reset for Post Reset Evaluation
    2.
    发明申请
    Methods and Apparatus for Saving Conditions Prior to a Reset for Post Reset Evaluation 有权
    在重置后复位评估之前保存条件的方法和装置

    公开(公告)号:US20130145137A1

    公开(公告)日:2013-06-06

    申请号:US13309623

    申请日:2011-12-02

    IPC分类号: G06F15/177 G06F12/16

    CPC分类号: G06F11/1441

    摘要: A processor reset control circuit is configured to automatically capture a pre-reset value of processor information stored in one or more hardware registers, as part of a reset operation state machine and prior to changing the processor information to its architecturally required post reset value. Such pre-reset processor information includes, for example one or more pre-reset values of the processor program counter (PC) and one or more pre-reset values of an operating-state mode register, both of which may be captured in one or more pre-reset capture storage devices which are then made available for evaluation purposes. Such pre-reset capture storage devices store pre-reset information in response to the reset and maintain the stored pre-reset information until another reset occurs.

    摘要翻译: 处理器复位控制电路被配置为自动捕获存储在一个或多个硬件寄存器中的处理器信息的预复位值,作为复位操作状态机的一部分,并且在将处理器信息改变为其架构上所需的后置复位值之前。 这种预复位处理器信息包括例如处理器程序计数器(PC)的一个或多个预复位值和操作状态模式寄存器的一个或多个预复位值,它们都可以被捕获在一个或多个 更多的预复位捕获存储设备,然后可用于评估目的。 这种预复位捕获存储设备响应于重置来存储预复位信息,并保持所存储的预复位信息直到发生另一个复位。