公开(公告)号：US4972314A

公开(公告)日：1990-11-20

申请号：US218520

申请日：1988-07-05

申请人： Thomas W. Getzinger ,  Hans L. Habereder ,  R. Loyd Harrison ,  Donald M. Hopp ,  David L. Mitchell ,  Chao-Kuang Pian ,  John A. Propster

发明人： Thomas W. Getzinger ,  Hans L. Habereder ,  R. Loyd Harrison ,  Donald M. Hopp ,  David L. Mitchell ,  Chao-Kuang Pian ,  John A. Propster

IPC分类号： G06F13/14

CPC分类号： G06F13/14 ,  G06F9/4436

摘要： A single instruction stream multiple data steam data flow signal processor and method for implementing macro data flow control, in which a plurality of data processors have contentionless access to global memory data. Data processing tasks for the data processors, such as primitive executions together with graph scheduling processes, are developed asynchronously and in parallel from a command program and a macro data flow control graph.

摘要翻译： 单个指令流多个数据流数据流信号处理器和用于实现宏数据流控制的方法，其中多个数据处理器具有无限访问全局存储器数据。 用于数据处理器的数据处理任务，例如原始执行以及图表调度过程，是从命令程序和宏数据流控制图异步并行开发的。

公开(公告)号：US5357632A

公开(公告)日：1994-10-18

申请号：US742781

申请日：1991-08-08

申请人： Chao-Kuang Pian ,  Hans L. Habereder

发明人： Chao-Kuang Pian ,  Hans L. Habereder

IPC分类号： G06F9/50 ,  G06F9/46 ,  G06F9/445

CPC分类号： G06F9/505 ,  Y10S707/99934

摘要： A plurality of control processors distribute data to be processed to a corresponding plurality of arithmetic processors using a dynamic allocation arrangement. The arithmetic processors process blocks of information and communicate the blocks of processed information to the control processors for subsequent processing as necessary. The control processors are implemented to efficiently allocate tasks to the arithmetic processors and to partition blocks of data for allocation as separate partitioned tasks to the arithmetic processors. This partitioning of blocks of data to be processed as partitioned tasks significantly reduces the delay until the results are available by distributing the task over a plurality of arithmetic processors. It also significantly improves utilization of processing resources by assigning the task to a plurality of processors that may be available.

摘要翻译： 多个控制处理器使用动态分配布置将要处理的数据分配给相应的多个算术处理器。 算术处理器处理信息块，并将处理后的信息块传送到控制处理器，以便随后进行处理。 控制处理器被实现以有效地将任务分配给算术处理器，并且将分配数据块作为分离的分区任务分配给算术处理器。 要被处理为分区任务的数据块的这种划分通过在多个算术处理器上分发任务来显着减少延迟，直到结果可用。 它还通过将任务分配给可能可用的多个处理器来显着地提高处理资源的利用率。

公开(公告)号：US5099418A

公开(公告)日：1992-03-24

申请号：US538349

申请日：1990-06-14

申请人： Chao-Kuang Pian ,  Minh-Tram D. Nguyen ,  Theodore E. Posch ,  Jeffrey E. Juhre

发明人： Chao-Kuang Pian ,  Minh-Tram D. Nguyen ,  Theodore E. Posch ,  Jeffrey E. Juhre

IPC分类号： G06F9/44

CPC分类号： G06F9/4436

摘要： A data driven method for coordinating the processing of arithmetic tasks in a multiple computer system having a multiplicity of arithmetic processors by determining whether an arithmetic task is in a blocked condition or is in an execution ready condition. A source distributed processor stores data in a local memory for processing by a local processor and then transfers the processed data to a global memory for buffering in preparation for subsequent processing by a destination distributed processor. The source distributed processor generates a produce message to a destination distributed processor to indicate that the data to be transferred is available in a buffer in the global memory. The destination distributed processor loads the data to be transferred from the buffer in the global memory and then generates a consume message to the source distributed processor to indicate that the data has been transferred from the global memory and the buffer in the global memory is now available.

摘要翻译： 一种数据驱动方法，用于通过确定算术任务是处于阻塞状态还是处于执行就绪状态来协调具有多个算术处理器的多计算机系统中的算术任务的处理。 源分布式处理器将数据存储在本地存储器中用于由本地处理器进行处理，然后将处理的数据传送到全局存储器以进行缓冲，以准备由目标分布式处理器进行后续处理。 源分布式处理器向目标分布式处理器生成产生消息，以指示待传输的数据在全局存储器中的缓冲器中可用。 目的地分布式处理器将要从全局存储器中的缓冲区传送的数据加载，然后生成消息消息到源分布式处理器，以指示数据已经从全局存储器传输，并且全局存储器中的缓冲区现在可用 。