公开(公告)号：US11380697B2

公开(公告)日：2022-07-05

申请号：US16800344

申请日：2020-02-25

Applicant: Tokyo Electron Limited

Inventor： Soo Doo Chae ,  Sang Cheol Han ,  Youngwoo Park

IPC: H01L27/11582 ,  H01L27/11524 ,  H01L21/285 ,  H01L27/11556

Abstract: Embodiments provide raised pad formations for step contacts in three-dimensional structures formed on microelectronic workpieces. Steps are formed in a multilayer stack that is used for the three-dimensional structure. The multilayer stack includes alternating non-conductive and conductive layers. For one embodiment, alternating oxide and polysilicon layers are used. The steps expose contact regions on different conductive layers. Material layers are formed on the contact regions to form raised pads. The material layers preferably have a high selectivity with respect to the non-conductive material for etch processes. A protective layer is formed over the steps and the raised pads, and contact holes are formed through the protective layer to the raised pads. Contacts are then formed within the contact holes. The raised pads inhibit punch-through of the non-conductive layers during the forming of the contact holes thereby improving performance of resulting devices formed in the microelectronic workpieces.

公开(公告)号：US20210265369A1

公开(公告)日：2021-08-26

申请号：US16800344

申请日：2020-02-25

Applicant: Tokyo Electron Limited

Inventor： Soo Doo Chae ,  Sang Cheol Han ,  Youngwoo Park

IPC: H01L27/11524 ,  H01L27/11582

Abstract: Embodiments provide raised pad formations for step contacts in three-dimensional structures formed on microelectronic workpieces. Steps are formed in a multilayer stack that is used for the three-dimensional structure. The multilayer stack includes alternating non-conductive and conductive layers. For one embodiment, alternating oxide and polysilicon layers are used. The steps expose contact regions on different conductive layers. Material layers are formed on the contact regions to form raised pads. The material layers preferably have a high selectivity with respect to the non-conductive material for etch processes. A protective layer is formed over the steps and the raised pads, and contact holes are formed through the protective layer to the raised pads. Contacts are then formed within the contact holes. The raised pads inhibit punch-through of the non-conductive layers during the forming of the contact holes thereby improving performance of resulting devices formed in the microelectronic workpieces.

公开(公告)号：US20210288069A1

公开(公告)日：2021-09-16

申请号：US17197144

申请日：2021-03-10

Applicant: Tokyo Electron Limited

Inventor： Soo Doo Chae ,  Sang Cheol Han ,  Youngwoo Park

IPC: H01L27/11582

Abstract: In certain embodiments, a 3D structure for a microelectronic workpiece includes a multilayer stack that includes polysilicon layers separated by other layers, holes formed within the multilayer stack, recesses formed within the polysilicon layers at edges of the holes, conductive material deposited within the recesses to form outer layers within the holes, and plugs formed adjacent the outer layers within the holes.

公开(公告)号：US20220246626A1

公开(公告)日：2022-08-04

申请号：US17719625

申请日：2022-04-13

Applicant: Tokyo Electron Limited

Inventor： Soo Doo Chae ,  Sang Cheol Han ,  Youngwoo Park

IPC: H01L27/11524 ,  H01L27/11582

Abstract: Embodiments provide raised pad formations for step contacts in three-dimensional structures formed on microelectronic workpieces. Steps are formed in a multilayer stack that is used for the three-dimensional structure. The multilayer stack includes alternating non-conductive and conductive layers. For one embodiment, alternating oxide and polysilicon layers are used. The steps expose contact regions on different conductive layers. Material layers are formed on the contact regions to form raised pads. The material layers preferably have a high selectivity with respect to the non-conductive material for etch processes. A protective layer is formed over the steps and the raised pads, and contact holes are formed through the protective layer to the raised pads. Contacts are then formed within the contact holes. The raised pads inhibit punch-through of the non-conductive layers during the forming of the contact holes thereby improving performance of resulting devices formed in the microelectronic workpieces.