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公开(公告)号:US12094783B2
公开(公告)日:2024-09-17
申请号:US18209490
申请日:2023-06-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Chun-Ya Chiu , Chi-Ting Wu , Chin-Hung Chen , Yu-Hsiang Lin
IPC: H01L29/06 , H01L21/8234 , H01L27/088
CPC classification number: H01L21/823481 , H01L21/823431 , H01L27/0886 , H01L29/0649
Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion; forming a first gate structure on the SDB structure; forming an interlayer dielectric (ILD) layer around the first gate structure; transforming the first gate structure into a first metal gate; removing the first metal gate to form a first recess; and forming a dielectric layer in the first recess.
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公开(公告)号:US20210296182A1
公开(公告)日:2021-09-23
申请号:US17338666
申请日:2021-06-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Chun-Ya Chiu , Chi-Ting Wu , Chin-Hung Chen , Yu-Hsiang Lin
IPC: H01L21/8234 , H01L29/06 , H01L27/088
Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion; forming a first gate structure on the SDB structure; forming an interlayer dielectric (ILD) layer around the first gate structure; transforming the first gate structure into a first metal gate; removing the first metal gate to form a first recess; and forming a dielectric layer in the first recess.
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公开(公告)号:US10854502B2
公开(公告)日:2020-12-01
申请号:US16733214
申请日:2020-01-02
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Chun-Ya Chiu , Chi-Ting Wu , Chin-Hung Chen , Yu-Hsiang Lin
IPC: H01L21/762 , H01L21/8234 , H01L29/78 , H01L29/66
Abstract: A semiconductor device includes a gate structure on a fin-shaped structure, a single diffusion break (SDB) structure adjacent to the gate structure, a shallow trench isolation (STI) around the fin-shaped structure, and an isolation structure on the STI. Preferably, a top surface of the SDB structure is even with a top surface of the isolation structure, and the SDB structure includes a bottom portion in the fin-shaped structure and a top portion on the bottom portion.
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公开(公告)号:US20240371703A1
公开(公告)日:2024-11-07
申请号:US18773598
申请日:2024-07-16
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Chun-Ya Chiu , Chi-Ting Wu , Chin-Hung Chen , Yu-Hsiang Lin
IPC: H01L21/8234 , H01L27/088 , H01L29/06
Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, a first isolation structure on the SDB structure, a shallow trench isolation (STI) adjacent to the SDB structure, and a second isolation structure on the STI. Preferably, the first isolation structure further includes a cap layer on the SDB structure and a dielectric layer on the cap layer.
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公开(公告)号:US20230326805A1
公开(公告)日:2023-10-12
申请号:US18209490
申请日:2023-06-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Chun-Ya Chiu , Chi-Ting Wu , Chin-Hung Chen , Yu-Hsiang Lin
IPC: H01L21/8234 , H01L29/06 , H01L27/088
CPC classification number: H01L21/823481 , H01L21/823431 , H01L29/0649 , H01L27/0886
Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion; forming a first gate structure on the SDB structure; forming an interlayer dielectric (ILD) layer around the first gate structure; transforming the first gate structure into a first metal gate; removing the first metal gate to form a first recess; and forming a dielectric layer in the first recess.
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公开(公告)号:US11417564B2
公开(公告)日:2022-08-16
申请号:US17190439
申请日:2021-03-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Chun-Ya Chiu , Chi-Ting Wu , Chin-Hung Chen , Yu-Hsiang Lin
IPC: H01L29/66 , H01L21/762 , H01L21/8234 , H01L29/78
Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a single diffusion break (SDB) structure dividing the fin-shaped structure into a first portion and a second portion as the SDB structure includes a bottom portion in the fin-shaped structure and a top portion on the bottom portion, a spacer around the top portion, a first epitaxial layer adjacent to one side of the top portion, and a second epitaxial layer adjacent to another side of the top portion.
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公开(公告)号:US11062954B2
公开(公告)日:2021-07-13
申请号:US16807108
申请日:2020-03-02
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Chun-Ya Chiu , Chi-Ting Wu , Chin-Hung Chen , Yu-Hsiang Lin
IPC: H01L29/06 , H01L21/8234 , H01L27/088
Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion; forming a first gate structure on the SDB structure; forming an interlayer dielectric (ILD) layer around the first gate structure; transforming the first gate structure into a first metal gate; removing the first metal gate to form a first recess; and forming a dielectric layer in the first recess.
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公开(公告)号:US10607882B2
公开(公告)日:2020-03-31
申请号:US15873838
申请日:2018-01-17
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Chun-Ya Chiu , Chi-Ting Wu , Chin-Hung Chen , Yu-Hsiang Lin
IPC: H01L29/66 , H01L21/762 , H01L21/8234 , H01L29/78
Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion; forming a first gate structure on the SDB structure; forming an interlayer dielectric (ILD) layer on the first gate structure; removing the first gate structure to form a first recess; and forming a dielectric layer in the first recess.
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公开(公告)号:US10395991B2
公开(公告)日:2019-08-27
申请号:US15830008
申请日:2017-12-04
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Yu-Hsiang Hung , Chun-Ya Chiu , Chin-Hung Chen , Chi-Ting Wu , Yu-Hsiang Lin
IPC: H01L27/088 , H01L21/8234 , H01L21/311 , H01L21/768 , H01L23/535 , H01L29/49 , H01L29/66
Abstract: A method for fabricating semiconductor device includes the steps of: forming a first gate structure and a second gate structure on a substrate and an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; transforming the first gate structure into a first metal gate and the second gate structure into a second metal gate; removing part of the ILD layer between the first metal gate and the second metal gate to form a recess; forming a first spacer and a second spacer in the a recess; performing a first etching process to form a first contact hole; and performing a second etching process to extend the first contact hole into a second contact hole.
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公开(公告)号:US11901239B2
公开(公告)日:2024-02-13
申请号:US18104307
申请日:2023-02-01
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Kai Hsu , Ssu-I Fu , Chun-Ya Chiu , Chi-Ting Wu , Chin-Hung Chen , Yu-Hsiang Lin
IPC: H01L29/06 , H01L21/8234 , H01L27/088
CPC classification number: H01L21/823481 , H01L21/823431 , H01L27/0886 , H01L29/0649
Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, a metal gate adjacent to the isolation structure, a shallow trench isolation (STI around the fin-shaped structure, and a second isolation structure on the STI. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.
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