公开(公告)号：US20250046372A1

公开(公告)日：2025-02-06

申请号：US18367488

申请日：2023-09-13

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Shu-Hung Yu ,  Chuan-Fu Wang ,  Chung-Chin Shih

IPC: G11C13/00

Abstract: A memory includes a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor, a first resistive memory element and a second resistive memory element. Each of the first switch transistor, the second switch transistor, the third switch transistor and the fourth switch transistor includes a drain terminal, a source terminal and a gate terminal. The drain terminal of the third switch transistor is coupled to the source terminal of the first switch transistor. The drain terminal of the fourth switch transistor is coupled to the source terminal of the second switch transistor. The first resistive memory element is coupled to the source terminal of the fourth switch transistor and the source terminal of the first switch transistor. The second resistive memory element is coupled to the source terminal of the third switch transistor and the source terminal of the second switch transistor.