公开(公告)号：US10249357B1

公开(公告)日：2019-04-02

申请号：US15821762

申请日：2017-11-23

申请人： UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

发明人： Wen-Chin Lin ,  Jhih-Yuan Chen ,  Syue-Ren Wu ,  Meng-Hsun Wu

IPC分类号： G11C11/24 ,  G11C11/403 ,  H01L27/108

摘要： A semiconductor device includes a substrate having a memory region and a peripheral region defined thereon, wherein the peripheral region comprises at least one transistor, the memory region comprises a plurality of memory cells, each memory cell comprises at least one gate structure and a capacitor structure, a mask layer disposed on the capacitor structure in the memory region, and a dielectric layer disposed on the substrate within the peripheral region, wherein a top surface of the dielectric layer is aligned with a top surface of the mask layer.