公开(公告)号：US09508813B1

公开(公告)日：2016-11-29

申请号：US14706002

申请日：2015-05-07

Applicant: UNITED MICROELECTRONICS CORPORATION

Inventor： Yen-Ming Chen ,  Chiuling Lee ,  Min-Hsuan Tsai ,  Zheng Hong Chen ,  Wei Hsuan Chang ,  Tseng-Hsun Liu

IPC: H01L29/423 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/42364 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/1087 ,  H01L29/4238 ,  H01L29/66795 ,  H01L29/7835 ,  H01L29/785

Abstract: The present invention provides a transistor comprising a substrate having a surface; a first deep well region in the substrate; a second deep well region in the substrate, isolated from and encircling the first deep well region; a first well region in the substrate and on the first deep well region; two second well regions in the second deep well region and respectively at two opposite sides of the first well region; a source region in the first well region and adjacent to the surface; two drain regions in the two second well regions respectively and adjacent to the surface; two gate structures on the surface, wherein each of the two gate structures is between the source region and one of the drain regions respectively; and a guard ring in the substrate encircling the second deep well region, and on the periphery of the transistor.

Abstract translation: 本发明提供一种晶体管，其包括具有表面的衬底; 衬底中的第一深阱区; 在衬底中的第二深阱区域，从第一深井区域隔离并环绕第一深井区域; 在衬底中和第一深阱区域上的第一阱区; 第二深井区域中的两个第二阱区域和分别在第一阱区域的两个相对侧的两个第二阱区域; 所述第一阱区域中的源极区域并且与所述表面相邻; 分别在两个第二阱区域中与表面相邻的两个漏极区域; 表面上的两个栅极结构，其中两个栅极结构中的每一个分别在源极区域和漏极区域之一之间; 以及在衬底中的围绕第二深阱区域的保护环，并且在晶体管的外围。