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Patent Agency Ranking
1.发明公开公开(公告)号：US20240211791A1
公开(公告)日：2024-06-27
申请号：US18188731
申请日：2023-03-23
Applicant: University of Chicago
Inventor： Frederic T. Chong , Jason Chadwick
CPC classification number: G06N10/60 , G06F9/30036 , G06N10/40
Abstract: A quantum computing system for optimizing instructions of a quantum circuit is configured to: select reference points in a parameter space of a family of gates that are executable by the quantum processor; identify edges in the parameter space connecting two reference points; compute a pulse vector for each reference point of the plurality of reference points; optimize the pulse vector for each reference point of the plurality of reference points based on the first pulse vector of each neighboring reference point connected to that reference point by an edge; receive a target operation from the quantum circuit for optimization; compute a second pulse vector for the target operation based on interpolating between a subset of reference points of the plurality of reference points; and executed the target operation on a quantum processor using the pulse vector for the target operation.
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公开(公告)号：US20240378085A1
公开(公告)日：2024-11-14
申请号：US18554835
申请日：2022-04-13
Applicant: THE UNIVERSITY OF CHICAGO
Inventor： Gokul Subramanian Ravi , Frederic T. Chong , Pranav Gokhale , Kaitlin N. Smith
IPC: G06F9/50
Abstract: A quantum computing system providing quantum processing as a service includes a quantum computing device and a server including at least one classical processor. The server is configured to: create a first job queue that includes a plurality of jobs configured to be executed on the first quantum computing device; receive, from a client device, a request for execution of a quantum program; add a first job entry to the first job queue for the request, the first job entry includes a quantum circuit for a first job; perform an optimization process on the quantum circuit of the first job; transmit the updated quantum circuit to the first quantum computing device for execution by the first quantum computing device using the plurality of qubits; receive, from the quantum computing device, execution results from the execution of the updated quantum circuit; and transmit the execution results to the client device.
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3.发明授权公开(公告)号：US11886379B2
公开(公告)日：2024-01-30
申请号：US17641036
申请日：2020-09-09
Applicant: University of Chicago
Inventor： Pranav Gokhale , Yongshan Ding , Thomas Propson , Frederic T. Chong
Abstract: A computing system includes a quantum processor with qubits, a classical memory including a quantum program defining a plurality of instructions in a source language, and a classical processor configured to: (i) receive a circuit of gates representing a quantum program for a variational algorithm in which computation is interleaved with compilation; (ii) identify a plurality of blocks, each block includes a subcircuit of gates, leaving one or more remainder subcircuits of the circuit of gates outside of the plurality of blocks; (iii) pre-compile each block of the plurality of blocks with a pulse generation program to generate a plurality of pre-compiled blocks including control pulses configured to perform the associated block on the quantum processor; and (iv) iteratively execute the quantum program using the pre-compiled blocks as static during runtime and recompiling the one or more remainder subcircuits on the classical processor at each iteration of execution.
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公开(公告)号：US20210334081A1
公开(公告)日：2021-10-28
申请号：US17273938
申请日：2019-09-12
Applicant: University of Chicago
Inventor： Frederic T. Chong , Yunong Shi, I , Nelson Leung , Pranav Gokhale , Henry Hoffmann , David Schuster
Abstract: A quantum computing system includes a quantum processor having a plurality of qubits, a classical memory, and a classical processor. The classical processor is configured to compile a quantum program into logical assembly instructions in an intermediate language, aggregate the logical assembly instructions together into a plurality of logical blocks of instructions, generate a logical schedule for the quantum program based on commutativity between the plurality of logical blocks, generate a tentative physical schedule based on the logical schedule, the tentative physical schedule includes a mapping of the logical assembly instructions in the logical schedule onto the plurality of qubits of the quantum processor, aggregate instructions together within the tentative physical schedule that do not reduce parallelism, thereby generating an updated physical schedule; generate optimized control pulses for the aggregated instructions, and execute the quantum program on the quantum processor with the optimized control pulses and the updated physical schedule.
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公开(公告)号：US11416228B2
公开(公告)日：2022-08-16
申请号：US17273938
申请日：2019-09-12
Applicant: University of Chicago
Inventor： Frederic T. Chong , Yunong Shi, I , Nelson Leung , Pranav Gokhale , Henry Hoffmann , David Schuster
Abstract: A quantum computing system includes a quantum processor having a plurality of qubits, a classical memory, and a classical processor. The classical processor is configured to compile a quantum program into logical assembly instructions in an intermediate language, aggregate the logical assembly instructions together into a plurality of logical blocks of instructions, generate a logical schedule for the quantum program based on commutativity between the plurality of logical blocks, generate a tentative physical schedule based on the logical schedule, the tentative physical schedule includes a mapping of the logical assembly instructions in the logical schedule onto the plurality of qubits of the quantum processor, aggregate instructions together within the tentative physical schedule that do not reduce parallelism, thereby generating an updated physical schedule; generate optimized control pulses for the aggregated instructions, and execute the quantum program on the quantum processor with the optimized control pulses and the updated physical schedule.
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