Voltage-to-time converter architecture for time-domain analog-to-digital converter

    公开(公告)号:US11356110B1

    公开(公告)日:2022-06-07

    申请号:US17328716

    申请日:2021-05-24

    Abstract: A voltage-to-time converter (VTC) for a time-domain analog-to-digital converter is disclosed, which provides a time-domain analog-to-digital converter (T-ADC) with low power consumption and high precision. By combining the advantages of current-starving technology, current mirror technology, and body biasing technology, compared with the traditional structure, the VTC and T-ADC achieve excellent performance, such as low power consumption, high linearity, wide input dynamic range, and strong anti-interference to PVT variations. Compared with the traditional voltage-to-time converter, the disclosed voltage-to-time converter has a wider input dynamic range and higher linearity. The input voltage is connected to transistors in the circuit as a body bias, resulting in a very small body current, and no apparent increase in power consumption. The design of a low-power voltage-to-time converter is realized.

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