公开(公告)号：US11126550B1

公开(公告)日：2021-09-21

申请号：US16121339

申请日：2018-09-04

申请人： University of Maryland at College Park ,  Crossbar, Inc.

发明人： Donald Yeung ,  Bruce L. Jacob ,  Mehdi Asnaashari ,  Sylvain Dubois

IPC分类号： G11C11/00 ,  G06F12/0802 ,  G11C13/00 ,  H01L27/24

摘要： Disclosed is a monolithic integrated circuit (IC) computing device with multiple independent process cores (multicore) and embedded, non-volatile resistive memory serving as system memory. The resistive system memory is fabricated above the substrate, and logic circuits embodying the process cores are fabricated on the substrate. In addition, access circuitry for operating on the resistive system memory, and circuitry embodying memory controllers, routing devices and other logic components is provided at least in part on the substrate. Large main memory capacities of tens or hundreds of gigabytes (GB) are provided and operable with many process cores, all on a single die. This monolithic integration provides close physical proximity between the process cores and main memory, facilitating significant memory parallelism, reduced power consumption, and eliminating off-chip main memory access requests.