公开(公告)号：US20140223079A1

公开(公告)日：2014-08-07

申请号：US13959761

申请日：2013-08-06

Applicant: VIA Technologies, Inc

Inventor： Bo Zhang ,  Chen Xiu

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7201

Abstract: A non-volatile memory (NVM) apparatus and an operation method thereof are provided. A mapping table in a main memory is divided into a plurality of sub-mapping tables according to logical address groups. When an access command of a host is processed by the NVM apparatus, at least one corresponding sub-mapping table is selected from the sub-mapping tables according to a logical address of the access command. If the at least one corresponding sub-mapping table is required to be rebuilt, then the at least one corresponding sub-mapping table is rebuilt, and the logical address of the access command is converter for accessing the NVM apparatus according to the at least one corresponding sub-mapping table which has been rebuilt.

Abstract translation: 提供了一种非易失性存储器（NVM）装置及其操作方法。 主存储器中的映射表根据逻辑地址组被划分为多个子映射表。 当由NVM装置处理主机的访问命令时，根据访问命令的逻辑地址从子映射表中选择至少一个对应的子映射表。 如果需要重建所述至少一个对应的子映射表，则重建所述至少一个对应的子映射表，并且所述访问命令的逻辑地址是根据所述至少一个访问所述NVM设备的转换器 相应的子映射表已被重建。

公开(公告)号：US09218280B2

公开(公告)日：2015-12-22

申请号：US13959761

申请日：2013-08-06

Applicant: VIA Technologies, Inc.

Inventor： Bo Zhang ,  Chen Xiu

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7201

Abstract: A non-volatile memory (NVM) apparatus and an operation method thereof are provided. A mapping table in a main memory is divided into a plurality of sub-mapping tables according to logical address groups. When an access command of a host is processed by the NVM apparatus, at least one corresponding sub-mapping table is selected from the sub-mapping tables according to a logical address of the access command. If the at least one corresponding sub-mapping table is required to be rebuilt, then the at least one corresponding sub-mapping table is rebuilt, and the logical address of the access command is converter for accessing the NVM apparatus according to the at least one corresponding sub-mapping table which has been rebuilt.

Abstract translation: 提供了一种非易失性存储器（NVM）装置及其操作方法。 主存储器中的映射表根据逻辑地址组被划分为多个子映射表。 当由NVM装置处理主机的访问命令时，根据访问命令的逻辑地址从子映射表中选择至少一个对应的子映射表。 如果需要重建所述至少一个对应的子映射表，则重建所述至少一个对应的子映射表，并且所述访问命令的逻辑地址是根据所述至少一个访问所述NVM设备的转换器 相应的子映射表已被重建。

公开(公告)号：US09053013B2

公开(公告)日：2015-06-09

申请号：US13908736

申请日：2013-06-03

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Bo Zhang ,  Chen Xiu

IPC: G06F12/02 ,  G06F12/08

CPC classification number: G06F12/0246 ,  G06F12/0802 ,  G06F2212/7202 ,  G06F2212/7203

Abstract: A data storage device with a FLASH memory and an operating method for the data storage device are disclosed. According to the disclosure, the space of the FLASH memory is allocated to include groups of data blocks, a plurality of shared cache blocks (SCBs) and a plurality of dedicated cache blocks (DCBs). Each SCB is shared by one group of data blocks, for the write data storage when any data block of the group of data blocks is exhausted. The DCBs are allocated for the hot data storage. Each DCB corresponds to one hot logical block.

Abstract translation: 公开了具有FLASH存储器和数据存储装置的操作方法的数据存储装置。 根据本公开，FLASH存储器的空间被分配为包括数据块组，多个共享高速缓存块（SCB）和多个专用高速缓存块（DCB））。 当数据块组中的任何数据块用完时，每个SCB由一组数据块共享，用于写数据存储。 DCB分配给热数据存储。 每个DCB对应于一个热逻辑块。

公开(公告)号：US09329995B2

公开(公告)日：2016-05-03

申请号：US14548549

申请日：2014-11-20

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Liang Chen ,  Chen Xiu

IPC: G06F12/02 ,  G06F11/14

CPC classification number: G06F12/0246 ,  G06F11/1441 ,  G06F2212/7201 ,  Y02D10/13

Abstract: The invention provides a memory device. The memory device includes a flash memory, a memory, and a controller. The flash memory includes a plurality of blocks for data storage. The memory stores an address mapping table recording relationships between logical addresses and physical addresses of the blocks therein. The controller divides the address mapping table stored in the memory to a plurality of mapping table units, updates relationships between the logical addresses and the physical addresses stored in the mapping table units, determines whether data access performed to the flash memory fulfills the conditions of a specific requirement, and when the data access fulfills the conditions of the specific requirement, the controller selects a target mapping table unit from the mapping table units, and stores the target mapping table unit and a corresponding time stamp as a mapping table unit data to the flash memory.

Abstract translation: 本发明提供一种存储装置。 存储器件包括闪存，存储器和控制器。 闪存包括用于数据存储的多个块。 存储器存储记录其中的块的逻辑地址和物理地址之间的关系的地址映射表。 控制器将存储在存储器中的地址映射表分成多个映射表单元，更新存储在映射表单元中的逻辑地址和物理地址之间的关系，确定对闪速存储器执行的数据访问是否满足条件 特定要求，并且当数据访问满足特定要求的条件时，控制器从映射表单元中选择目标映射表单元，并将目标映射表单元和对应的时间戳作为映射表单元数据存储到 闪存