公开(公告)号：US09048098B2

公开(公告)日：2015-06-02

申请号：US13666509

申请日：2012-11-01

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Ke-Yuan Chen ,  Jyh-Fong Lin

IPC: H01L27/02

CPC classification number: H01L27/0262 ,  H01L27/0248 ,  H01L27/0255 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electrostatic discharge protection device, having a P-type semiconductor substrate set as floating; a first N-well and a second N-well formed in the P-type substrate; a first P-doped region and a second P-doped region formed in the first N-well and the second N-well, respectively. The first N-well and the first P-doped region form a first diode, and the second N-well and the second P-doped region form a second diode. A first N-doped region and a second N-doped region formed in the first N-well and the second N-well respectively. A third P-doped region is formed in the P-type substrate, wherein the third P-doped region is disposed between the first N-well and the second N-well, and the third P-doped region is electrically connected to the first N-doped region and the second P-doped region.

Abstract translation: 一种静电放电保护装置，其具有浮置的P型半导体衬底; 在P型衬底中形成第一N阱和第二N阱; 分别形成在第一N阱和第二N阱中的第一P掺杂区和第二P掺杂区。 第一N阱和第一P掺杂区形成第一二极管，第二N阱和第二P掺杂区形成第二二极管。 分别形成在第一N阱和第二N阱中的第一N掺杂区和第二N掺杂区。 第三P掺杂区域形成在P型衬底中，其中第三P掺杂区域设置在第一N阱和第二N阱之间，并且第三P掺杂区域电连接到第一P阱掺杂区域 N掺杂区和第二P掺杂区。

公开(公告)号：US09111752B1

公开(公告)日：2015-08-18

申请号：US14696785

申请日：2015-04-27

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Ke-Yuan Chen ,  Jyh-Fong Lin

IPC: H02H9/00 ,  H01L27/02

CPC classification number: H01L27/0262 ,  H01L27/0248 ,  H01L27/0255 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electrostatic discharge protection device having a P-type substrate, a common N-well formed in the P-type substrate, a common N-doped region formed in the first common N-well, wherein the common N-doped region is electrically connected to a reference voltage node. The device further has a common P-doped region formed in the common N-well, wherein the common P-doped region surrounds the common N-doped region, the common P-doped region and the common N-well form a common diode, a plurality of peripheral N-wells formed in the P-type substrate and surrounding the common N-well, each of the peripheral N-wells comprising a P-type doped region and a N-type doped region, wherein the P-type doped region is electrically connected to one of a plurality of I/O terminals, and a circular P-doped region formed in the P-type substrate and disposed between the common N-well and the peripheral N-wells, and the circular P-doped region surrounding the common N-well.

Abstract translation: 一种具有P型衬底的静电放电保护器件，在P型衬底中形成的公共N阱，形成在第一公共N阱中的公共N掺杂区域，其中公共N掺杂区域电连接 到参考电压节点。 该器件还具有形成在公共N阱中的公共P掺杂区域，其中公共P掺杂区域围绕公共N掺杂区域，公共P掺杂区域和公共N阱形成公共二极管， 在P型衬底中形成的多个外围N阱并且围绕共用N阱，每个外围N阱包括P型掺杂区和N型掺杂区，其中P型掺杂 区域电连接到多个I / O端子中的一个，以及形成在P型衬底中并设置在公共N阱和外围N阱之间的圆形P掺杂区域，并且环形P掺杂 围绕普通N井的区域。