公开(公告)号：US20240259027A1

公开(公告)日：2024-08-01

申请号：US18160741

申请日：2023-01-27

Applicant: VIAVI Solutions Inc.

Inventor： Pablo PEREZ LARA ,  John Wilson

IPC: H03M1/06

CPC classification number: H03M1/0604

Abstract: In some implementations, a receiver may obtain a digitized output of a radio frequency (RF) analog-to-digital-converter (ADC) of the receiver. The receiver may apply a spur cancellation to the digitized output of the RF ADC to attenuate one or more continuous wave spurs from the digitized output of the RF ADC, wherein the spur cancellation is based on a frequency planning with coherent averaging.

公开(公告)号：US20230422062A1

公开(公告)日：2023-12-28

申请号：US17851455

申请日：2022-06-28

Applicant: VIAVI Solutions Inc.

Inventor： Pablo PEREZ LARA ,  John Dominic WILSON

IPC: H04W24/06

CPC classification number: H04W24/06 ,  H04W88/08

Abstract: Method for variable arbitrary resampling that allows a base station test system to correct for sampling frequency errors relative to the base station. An output time calculation module obtains the required output sample times depending on the resampling rate, which can be tuned as needed. An input sample counter module counts the last input sample loaded into a polyphase interpolator, which can calculate any of M interpolated samples between two consecutive input samples. The polyphase interpolator uses the integer part of the required output sample times to decide what interpolated samples to calculate. A sequencer module compares the calculated output times against the input sample count to control all the blocks of the variable arbitrary resampler and determine if the output of the polyphase interpolator is a valid sample. Valid samples are transferred to other subsystems, such as a digital-to-analog data converter or another signal processing module.