Memory circuit for programmable machines
    1.
    发明授权
    Memory circuit for programmable machines 失效
    可编程机器的存储电路

    公开(公告)号:US4281392A

    公开(公告)日:1981-07-28

    申请号:US35068

    申请日:1979-05-01

    CPC分类号: G06F12/0653

    摘要: A memory circuit receives memory modules which may vary in their size and their type. The memory circuit includes a decoder circuit which receives size feedback signals from each memory module which enables it to automatically assign each module the address space it requires. If the size of a memory module is changed, the decoder circuit reassigns the address space to accommodate the new module. Type feedback signals generated by each memory module enable the memory circuit to apply the proper control signals and enable the proper supporting circuitry when the memory module is addressed.

    摘要翻译: 存储器电路接收可能在尺寸和类型上变化的存储器模块。 存储器电路包括解码器电路,其从每个存储器模块接收大小反馈信号,使其能够自动地为每个模块分配其所需的地址空间。 如果存储器模块的尺寸改变,则解码器电路重新分配地址空间以容纳新的模块。 由每个存储器模块产生的类型反馈信号使得存储器电路能够施加适当的控制信号,并且当存储器模块被寻址时启用适当的支持电路。

    System and method for providing error check and correction in memory systems
    2.
    发明授权
    System and method for providing error check and correction in memory systems 有权
    用于在存储器系统中提供错误检查和校正的系统和方法

    公开(公告)号:US07328365B2

    公开(公告)日:2008-02-05

    申请号:US10768513

    申请日:2004-01-30

    IPC分类号: G06F11/10

    CPC分类号: G06F11/1056

    摘要: A system for providing error check and correction (ECC) is provided. The system includes an ECC interface for storing ECC codes in a first memory system and storing data in a second memory system. The ECC interface corrects errors in the data received from the second memory system utilizing the ECC codes received from the first memory system. The ECC interface asserts at least one error flag upon detecting errors in the data, and a processor monitors the at least one error flag and corrects the data stored in the first memory system.

    摘要翻译: 提供了一种用于提供错误检查和校正(ECC)的系统。 该系统包括用于在第一存储器系统中存储ECC代码并将数据存储在第二存储器系统中的ECC接口。 ECC接口使用从第一存储器系统接收的ECC代码校正从第二存储器系统接收的数据中的错误。 ECC接口在检测到数据中的错误时断言至少一个错误标志,并且处理器监视至少一个错误标志并校正存储在第一存储器系统中的数据。

    System and method for providing error check and correction in memory systems

    公开(公告)号:US06701480B1

    公开(公告)日:2004-03-02

    申请号:US09520780

    申请日:2000-03-08

    IPC分类号: G06F1110

    CPC分类号: G06F11/1056

    摘要: A system for providing error check and correction (ECC) is provided. The system includes an ECC interface for storing ECC codes in a first memory system and storing data in a second memory system. The ECC interface corrects errors in the data received from the second memory system utilizing the ECC codes received from the first memory system. The ECC interface asserts at least one error flag upon detecting errors in the data, and a processor monitors the at least one error flag and corrects the data stored in the first memory system.