Method and apparatus for performing parallel routing using a multi-threaded routing procedure
    2.
    发明申请
    Method and apparatus for performing parallel routing using a multi-threaded routing procedure 有权
    使用多线程路由过程执行并行路由的方法和装置

    公开(公告)号:US20100169858A1

    公开(公告)日:2010-07-01

    申请号:US12317789

    申请日:2008-12-29

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5077

    摘要: A method for designing a system to be implemented on a target device includes generating bounding boxes on the target device for nets in the system where a bounding box identifies routing resources available for routing its corresponding net. The nets in the system are assigned to a plurality of threads to be routed. The threads are executed so that a plurality of the nets are routed in parallel within their corresponding bounding box.

    摘要翻译: 一种用于设计要在目标设备上实现的系统的方法包括在系统中为网络生成目标设备上的边界框,其中边界框标识可用于路由其相应网络的路由资源。 系统中的网络被分配给要路由的多个线程。 执行线程使得多个网络在其对应的边界框内并行路由。

    Method and apparatus for performing parallel routing using a multi-threaded routing procedure
    3.
    发明授权
    Method and apparatus for performing parallel routing using a multi-threaded routing procedure 有权
    使用多线程路由过程执行并行路由的方法和装置

    公开(公告)号:US08296709B2

    公开(公告)日:2012-10-23

    申请号:US13311996

    申请日:2011-12-06

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5077

    摘要: A method for designing a system to be implemented on a target device includes generating bounding boxes on the target device for nets in the system where a bounding box identifies routing resources available for routing its corresponding net. The nets in the system are assigned to a plurality of threads to be routed. The threads are executed so that a plurality of the nets are routed in parallel within their corresponding bounding box.

    摘要翻译: 一种用于设计要在目标设备上实现的系统的方法包括在系统中为网络生成目标设备上的边界框,其中边界框标识可用于路由其相应网络的路由资源。 系统中的网络被分配给要路由的多个线程。 执行线程使得多个网络在其对应的边界框内并行路由。

    Method and Apparatus For Performing Parallel Routing Using A Multi-Threaded Routing Procedure
    4.
    发明申请
    Method and Apparatus For Performing Parallel Routing Using A Multi-Threaded Routing Procedure 有权
    使用多线程路由程序执行并行路由的方法和装置

    公开(公告)号:US20130007689A1

    公开(公告)日:2013-01-03

    申请号:US13615563

    申请日:2012-09-13

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5077

    摘要: A method for designing a system to be implemented on a target device includes generating bounding boxes on the target device for nets in the system where a bounding box identifies routing resources available for routing its corresponding net. The nets in the system are assigned to a plurality of threads to be routed. The threads are executed so that a plurality of the nets are routed in parallel within their corresponding bounding box.

    摘要翻译: 一种用于设计要在目标设备上实现的系统的方法包括在系统中为网络生成目标设备上的边界框,其中边界框标识可用于路由其相应网络的路由资源。 系统中的网络被分配给要路由的多个线程。 执行线程使得多个网络在其对应的边界框内并行路由。

    Method and Apparatus for Performing Parallel Routing Using a Multi-Threaded Routing Procedure
    5.
    发明申请
    Method and Apparatus for Performing Parallel Routing Using a Multi-Threaded Routing Procedure 有权
    使用多线程路由程序执行并行路由的方法和装置

    公开(公告)号:US20120131535A1

    公开(公告)日:2012-05-24

    申请号:US13311996

    申请日:2011-12-06

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5077

    摘要: A method for designing a system to be implemented on a target device includes generating bounding boxes on the target device for nets in the system where a bounding box identifies routing resources available for routing its corresponding net. The nets in the system are assigned to a plurality of threads to be routed. The threads are executed so that a plurality of the nets are routed in parallel within their corresponding bounding box.

    摘要翻译: 一种用于设计要在目标设备上实现的系统的方法包括在系统中为网络生成目标设备上的边界框,其中边界框标识可用于路由其相应网络的路由资源。 系统中的网络被分配给要路由的多个线程。 执行线程使得多个网络在其对应的边界框内并行路由。

    Methods for designing integrated circuits
    7.
    发明授权
    Methods for designing integrated circuits 有权
    集成电路设计方法

    公开(公告)号:US07441208B1

    公开(公告)日:2008-10-21

    申请号:US11225919

    申请日:2005-09-13

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5068

    摘要: The process of designing an integrated circuit (“IC”) to implement a generalized circuit design includes a signoff between a front-end part of the process and a back-end part of the process. This signoff preferably takes place after at least some global routing has been done for the IC implementation, but before all final detailed routing is done for that implementation.

    摘要翻译: 设计集成电路(“IC”)以实现广义电路设计的过程包括过程的前端部分与过程的后端部分之间的签名。 这种签名优选在对IC实现进行至少一些全局路由之后,但在为该实现完成所有最终详细路由之前进行。