公开(公告)号：US20240102166A1

公开(公告)日：2024-03-28

申请号：US18365629

申请日：2023-08-04

Applicant: Veeco Instruments Inc.

Inventor： Aniruddha Bagchi ,  Sandeep Krishnan ,  Eric Armour ,  Michael Chansky ,  Yuliy Rashkovsky ,  Andrew Hanser ,  Matthew Van Doren ,  William Wangard, III

IPC: C23C16/458 ,  H01L21/687

CPC classification number: C23C16/4585 ,  H01L21/68771 ,  H01L21/68785

Abstract: A wafer carrier includes a base including a generally planar bottom surface and a top surface that includes a plurality of platforms extending above the top surface. The wafer carrier includes a thermal cover defining a plurality of pockets. The thermal cover is configured to be coupled to the base by at least one fastener and the plurality of pockets are arranged such that each pocket of the plurality of pockets is aligned with a corresponding platform of the plurality of the platforms when the thermal cover is supported by a plurality of first pedestals that extend from the top surface of the base. A plurality of second pedestals are located along the plurality of platforms for supporting the one or more wafers, wherein each platform includes at least one second pedestal that extends from a top surface of the platform for supporting one wafer.