Apparatus and method for preventing configurable system-on-a-chip integrated circuits from beginning I/O limited
    1.
    发明授权
    Apparatus and method for preventing configurable system-on-a-chip integrated circuits from beginning I/O limited 有权
    开始I / O限制时防止可配置片上系统集成电路的装置和方法

    公开(公告)号:US07982321B2

    公开(公告)日:2011-07-19

    申请号:US12502136

    申请日:2009-07-13

    IPC分类号: H01L23/48 H01L23/52 H01L29/40

    摘要: An integrated circuit containing multiple modules coupled to a pad via a multiplexer. The modules are selectively coupled to the pad by the multiplexer to provide integrated circuit function flexibility with a limited number of pads. A multiplexer select signal determines which module or clock circuit is coupled by the multiplexer. A common buffer may be coupled between the multiplexer and the pad to save substrate space. An analog circuit may be coupled to the pad to provide a signal path minimizing signal distortion. The integrated circuit's clock may be coupled via the multiplexer to an off-substrate circuit. Selective module coupling improves the integrated circuit's testing speed, may salvage an integrated circuit containing a malfunctioning module, and provides for signal loopback during testing.

    摘要翻译: 一种集成电路,包含通过多路复用器耦合到焊盘的多个模块。 模块通过多路复用器选择性地耦合到焊盘,以提供具有有限数量的焊盘的集成电路功能灵活性。 复用器选择信号确定哪个模块或时钟电路由多路复用器耦合。 可以在多路复用器和衬垫之间耦合公共缓冲器以节省衬底空间。 模拟电路可以耦合到焊盘,以提供使信号失真最小化的信号路径。 集成电路的时钟可以经由多路复用器耦合到离基板电路。 选择性模块耦合提高了集成电路的测试速度,可以对包含故障模块的集成电路进行挽救,并在测试期间提供信号环回。

    Optimized performance and power access to a shared resource in a multiclock frequency system on a chip application
    2.
    发明申请
    Optimized performance and power access to a shared resource in a multiclock frequency system on a chip application 有权
    在片上应用程序的多锁频率系统中优化性能和功率访问共享资源

    公开(公告)号:US20080005437A1

    公开(公告)日:2008-01-03

    申请号:US11592284

    申请日:2006-11-02

    IPC分类号: G06F13/14

    摘要: A request from a first processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the first processor at a first clock frequency. A request from a second processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the second processor at a second clock frequency that is lower than the first clock frequency.

    摘要翻译: 接收来自第一处理器的访问计算系统中的共享资源的请求,并且第一处理器以第一时钟频率向共享资源提供访问。 接收来自第二处理器的访问计算系统中的共享资源的请求,并且第二处理器以比第一时钟频率低的第二时钟频率向共享资源提供访问。

    Apparatus and Method for Preventing Configurable System-on-a-Chip Integrated Circuits from Becoming I/O Limited
    3.
    发明申请
    Apparatus and Method for Preventing Configurable System-on-a-Chip Integrated Circuits from Becoming I/O Limited 有权
    用于防止可配置的片上集成电路成为I / O限制的装置和方法

    公开(公告)号:US20090273101A1

    公开(公告)日:2009-11-05

    申请号:US12502136

    申请日:2009-07-13

    IPC分类号: H01L23/48 H01L23/34

    摘要: An integrated circuit containing multiple modules coupled to a pad via a multiplexer. The modules are selectively coupled to the pad by the multiplexer to provide integrated circuit function flexibility with a limited number of pads. A multiplexer select signal determines which module or clock circuit is coupled by the multiplexer. A common buffer may be coupled between the multiplexer and the pad to save substrate space. An analog circuit may be coupled to the pad to provide a signal path minimizing signal distortion. The integrated circuit's clock may be coupled via the multiplexer to an off-substrate circuit. Selective module coupling improves the integrated circuit's testing speed, may salvage an integrated circuit containing a malfunctioning module, and provides for signal loopback during testing.

    摘要翻译: 一种集成电路,包含通过多路复用器耦合到焊盘的多个模块。 模块通过多路复用器选择性地耦合到焊盘,以提供具有有限数量的焊盘的集成电路功能灵活性。 复用器选择信号确定哪个模块或时钟电路由多路复用器耦合。 可以在多路复用器和衬垫之间耦合公共缓冲器以节省衬底空间。 模拟电路可以耦合到焊盘,以提供使信号失真最小化的信号路径。 集成电路的时钟可以经由多路复用器耦合到离基板电路。 选择性模块耦合提高了集成电路的测试速度,可以对包含故障模块的集成电路进行挽救,并在测试期间提供信号环回。

    Apparatus and method for preventing configurable system-on-a-chip integrated circuits from becoming I/O limited
    4.
    发明授权
    Apparatus and method for preventing configurable system-on-a-chip integrated circuits from becoming I/O limited 有权
    用于防止可配置片上系统集成电路变得I / O限制的装置和方法

    公开(公告)号:US07564141B2

    公开(公告)日:2009-07-21

    申请号:US11509714

    申请日:2006-08-25

    IPC分类号: H01L23/48 H01L23/52 H01L29/40

    摘要: An integrated circuit containing multiple modules coupled to a pad via a multiplexer. The modules are selectively coupled to the pad by the multiplexer to provide integrated circuit function flexibility with a limited number of pads. A multiplexer select signal determines which module or clock circuit is coupled by the multiplexer. A common buffer may be coupled between the multiplexer and the pad to save substrate space. An analog circuit may be coupled to the pad to provide a signal path minimizing signal distortion. The integrated circuit's clock may be coupled via the multiplexer to an off-substrate circuit. Selective module coupling improves the integrated circuit's testing speed, may salvage an integrated circuit containing a malfunctioning module, and provides for signal loopback during testing.

    摘要翻译: 一种集成电路,包含通过多路复用器耦合到焊盘的多个模块。 这些模块通过多路复用器选择性地耦合到焊盘,以提供具有有限数量的焊盘的集成电路功能灵活性。 复用器选择信号确定哪个模块或时钟电路由多路复用器耦合。 可以在多路复用器和衬垫之间耦合公共缓冲器以节省衬底空间。 模拟电路可以耦合到焊盘,以提供使信号失真最小化的信号路径。 集成电路的时钟可以经由多路复用器耦合到离基板电路。 选择性模块耦合提高了集成电路的测试速度,可以对包含故障模块的集成电路进行挽救,并在测试期间提供信号环回。

    Optimized performance and power access to a shared resource in a multiclock frequency system on a chip application
    5.
    发明授权
    Optimized performance and power access to a shared resource in a multiclock frequency system on a chip application 有权
    在片上应用程序的多锁频率系统中优化性能和功率访问共享资源

    公开(公告)号:US07555585B2

    公开(公告)日:2009-06-30

    申请号:US11592284

    申请日:2006-11-02

    IPC分类号: G06F12/00 G06F1/12

    摘要: A request from a first processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the first processor at a first clock frequency. A request from a second processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the second processor at a second clock frequency that is lower than the first clock frequency.

    摘要翻译: 接收来自第一处理器的访问计算系统中的共享资源的请求,并且第一处理器以第一时钟频率向共享资源提供访问。 接收来自第二处理器的访问计算系统中的共享资源的请求,并且第二处理器以比第一时钟频率低的第二时钟频率向共享资源提供访问。

    Apparatus and method for preventing configurable system-on-a-chip integrated circuits from becoming I/O limited
    6.
    发明申请
    Apparatus and method for preventing configurable system-on-a-chip integrated circuits from becoming I/O limited 有权
    用于防止可配置片上系统集成电路变得I / O限制的装置和方法

    公开(公告)号:US20070220191A1

    公开(公告)日:2007-09-20

    申请号:US11509714

    申请日:2006-08-25

    IPC分类号: G06F13/00

    摘要: An integrated circuit containing multiple modules coupled to a pad via a multiplexer. The modules are selectively coupled to the pad by the multiplexer to provide integrated circuit function flexibility with a limited number of pads. A multiplexer select signal determines which module or clock circuit is coupled by the multiplexer. A common buffer may be coupled between the multiplexer and the pad to save substrate space. An analog circuit may be coupled to the pad to provide a signal path minimizing signal distortion. The integrated circuit's clock may be coupled via the multiplexer to an off-substrate circuit. Selective module coupling improves the integrated circuit's testing speed, may salvage an integrated circuit containing a malfunctioning module, and provides for signal loopback during testing.

    摘要翻译: 一种集成电路,包含通过多路复用器耦合到焊盘的多个模块。 模块通过多路复用器选择性地耦合到焊盘,以提供具有有限数量的焊盘的集成电路功能灵活性。 复用器选择信号确定哪个模块或时钟电路由多路复用器耦合。 可以在多路复用器和衬垫之间耦合公共缓冲器以节省衬底空间。 模拟电路可以耦合到焊盘,以提供使信号失真最小化的信号路径。 集成电路的时钟可以经由多路复用器耦合到离基板电路。 选择性模块耦合提高了集成电路的测试速度,可以对包含故障模块的集成电路进行挽救,并在测试期间提供信号环回。

    OPTIMIZED PERFORMANCE AND POWER ACCESS TO A SHARED RESOURCE IN A MULTICLOCK FREQUENCY SYSTEM ON A CHIP APPLICATION
    7.
    发明申请
    OPTIMIZED PERFORMANCE AND POWER ACCESS TO A SHARED RESOURCE IN A MULTICLOCK FREQUENCY SYSTEM ON A CHIP APPLICATION 审中-公开
    在芯片应用中的多频率系统中优化的性能和功率访问到共享资源

    公开(公告)号:US20090240971A1

    公开(公告)日:2009-09-24

    申请号:US12475279

    申请日:2009-05-29

    IPC分类号: G06F1/08

    摘要: A request from a first processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the first processor at a first clock frequency. A request from a second processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the second processor at a second clock frequency that is lower than the first clock frequency.

    摘要翻译: 接收来自第一处理器的访问计算系统中的共享资源的请求,并且第一处理器以第一时钟频率向共享资源提供访问。 接收来自第二处理器的访问计算系统中的共享资源的请求,并且第二处理器以比第一时钟频率低的第二时钟频率向共享资源提供访问。

    Reverse link lower layer assisted video error control
    8.
    发明授权
    Reverse link lower layer assisted video error control 有权
    反向链路下层辅助视频错误控制

    公开(公告)号:US08514711B2

    公开(公告)日:2013-08-20

    申请号:US11454475

    申请日:2006-06-15

    IPC分类号: H04L1/00

    摘要: The disclosure relates to reverse link lower layer assisted video error control. A method may encode video data, form a packet with the encoded video data, and transmit the packet across a wireless channel to an access network. A medium access control (MAC) layer may receive a negative acknowledgement (NAK) from the access network. The method may determine whether the received NAK is associated with a packet that contains video data. If the received NAK is associated with a packet that contains video data, the method may perform error control.

    摘要翻译: 本公开涉及反向链路下层辅助视频错误控制。 一种方法可以对视频数据进行编码,形成具有编码视频数据的分组,并且通过无线信道将数据包发送到接入网络。 介质访问控制(MAC)层可以从接入网络接收否定的确认(NAK)。 该方法可以确定所接收的NAK是否与包含视频数据的分组相关联。 如果接收到的NAK与包含视频数据的分组相关联,则该方法可以执行错误控制。

    Methods for using broadcast media content information and related broadcast media receivers/playback devices
    9.
    发明申请
    Methods for using broadcast media content information and related broadcast media receivers/playback devices 失效
    使用广播媒体内容信息和相关广播媒体接收机/播放装置的方法

    公开(公告)号:US20070143816A1

    公开(公告)日:2007-06-21

    申请号:US11300972

    申请日:2005-12-15

    IPC分类号: H04N5/445 H04N7/16 H04N5/45

    摘要: Methods of displaying broadcast media content information to a user include receiving at a first receiver first content from a first channel of a multi-channel broadcast media system while receiving at a second receiver information regarding the content on a second off-channel of the multi-channel broadcast media system. Then, at least some of the received information regarding the content on the second channel is displayed to the user. A database of information may also be provided that includes, for example, information regarding listening/viewing preferences of the user. This database of information may be used, for example, to select the off-channels that are scanned for content information and/or to select what information is displayed to the user.

    摘要翻译: 向用户显示广播媒体内容信息的方法包括:在第一接收机处首先从多频道广播媒体系统的第一频道接收内容,同时在第二接收机接收关于所述多声道广播媒体系统的第二非信道上的内容的信息, 频道广播媒体系统。 然后,向用户显示关于第二频道上的内容的接收信息中的至少一些。 还可以提供包括例如关于用户的倾听/观看偏好的信息的信息数据库。 该信息数据库可以用于例如选择被扫描的内容信息的偏离频道和/或选择向用户显示哪些信息。

    METHODS AND APPARATUS FOR CONTEMPORANEOUSLY PROVIDING QUALITY OF SERVICE FUNCTIONALITY AND LOCAL IP ACCESS
    10.
    发明申请
    METHODS AND APPARATUS FOR CONTEMPORANEOUSLY PROVIDING QUALITY OF SERVICE FUNCTIONALITY AND LOCAL IP ACCESS 审中-公开
    提供服务质量和本地IP访问质量的方法和装置

    公开(公告)号:US20120269059A1

    公开(公告)日:2012-10-25

    申请号:US13275657

    申请日:2011-10-18

    IPC分类号: H04W28/02

    CPC分类号: H04W8/082 H04W8/26 H04W92/045

    摘要: A splitter component may be used by itself or with one or more ancillary devices to provide client devices local IP access (LIPA) using local area network (LAN) addresses, while contemporaneously providing quality of service (QoS) functionality to the access terminal for data communicated via a modem, contemporaneously with providing the LIPA. The splitter device may assign a higher priority to traffic of a type having QoS functionality. The QoS functionality may include any combination of a latency requirement, a signal quality requirement, or a signal strength requirement. Providing the one or more devices LIPA using one or more LAN addresses may include assigning each of the client devices an IP address and implementing a dynamic host configuration protocol (DHCP) relay on an associated router, or other LIPA functions.

    摘要翻译: 分离器组件可以单独使用或与一个或多个辅助设备一起使用以使用局域网(LAN)地址来提供客户端设备本地IP接入(LIPA),同时向接入终端提供数据的服务质量(QoS)功能 通过调制解调器通信,同时提供LIPA。 分离器设备可以为具有QoS功能的类型的业务分配更高的优先级。 QoS功能可以包括延迟要求,信号质量要求或信号强度要求的任何组合。 使用一个或多个LAN地址提供一个或多个设备LIPA可以包括为每个客户端设备分配IP地址并在相关联的路由器或其他LIPA功能上实现动态主机配置协议(DHCP)中继。