公开(公告)号：US5361339A

公开(公告)日：1994-11-01

申请号：US878192

申请日：1992-05-04

申请人： Vinod K. Kadakia ,  Christine H. Kang

发明人： Vinod K. Kadakia ,  Christine H. Kang

IPC分类号： G06F12/00 ,  G06T1/60 ,  G06T3/60 ,  G09G5/36 ,  G11C7/10 ,  G11C11/401 ,  H04N1/387 ,  G09G5/38 ,  G11C8/00

CPC分类号： G06T3/606 ,  G11C7/1021

摘要： A circuit for addressing a random access memory (RAM) and for rotating an image by reading it into and then out from a page buffer, where all transfers, whether by column or row, are performed substantially in a fast page mode in which the same row address is maintained from one access to the next. The column address lines of RAM devices are connected to the 5 or 6 least significant bits of the vertical and horizontal address counters of the image, and the row address lines are connected to the remaining most significant bits of the vertical and horizontal counters of the image. Therefore, whether the system is accessing the image data in the vertical or horizontal direction, there will be at least 31 fast page mode accesses for every one slow access, and the average speed of transfers in either direction will approximate the fast page mode speed.

摘要翻译： 用于寻址随机存取存储器（RAM）并通过将图像读入页面缓冲器而转移到图像缓冲器中的电路，其中所有传送（无论是通过列还是行）都基本上以相同的快速页面模式执行 行地址从一个访问维护到下一个。 RAM设备的列地址线连接到图像的垂直和水平地址计数器的5或6个最低有效位，并且行地址线连接到图像的垂直和水平计数器的剩余最高有效位 。 因此，无论系统是在垂直方向还是水平方向上访问图像数据，对于每一个慢速访问将存在至少31次快速页面模式访问，并且任一方向的平均传输速度将接近快速页面模式速度。